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    Overview :: News :: Downloads :: Tracker :: Discussions (cores) :: CVS    

    LPC ROM emulator on USB dongle FPGA core set: Overview

    Details

    Name: usb_dongle_fpga
    Created: 07-Dec-2006 02:27:15
    Updated: 21-Jul-2008 10:38:54
    CVS: browse

    Other project properties

    Category :: Prototype board
    Category :: Communication controller
    Language :: VHDL
    License :: LGPL
    Phaze :: FPGA proven
    Development status :: Production/Stable

    Project maintainers

  • Jüri Toomessoo
  • Statistics

  • view
  • Description

    Main features of latest v5 HW are:

    -LPC memory read (can be disabled),LPC Firmware Hub memory read
    and IO write for POST Code capture (and display on LED segments)
    -POST code peek mode (LPC reads from dongle are disabled)
    -POST code logger (sends all postcodes to USB serial port as hexadecimal bytes in ASCII)

    This is hardware project for existing USB dongle
    board (costing about 150 EUR you should check from sales(at)artecgroup.com). Using it for LPC dongle.


    LPC USB dongle

    IP cores

    • LPC slave (supporting IO write, Memory read and LPC Firmware Hub read from device ID 0x0000)
    • Flash Waveform generator
    • FTDI parallel interface to onboard flash (supports 32 byte block write and 64K block read)
    • FTDI parallel interface to convert and send bytes as hex codes in ASCII
    • Scanning LED segment display coder

    PCB Board

    http://www.artecgroup.com/products/hardware-products/programmable-lpc-dongle.html

    Can buy at:
    http://artecgroup.myshopify.com/products/programmable-lpc-dongle

    • Cyclone FPGA EP1C6T144C8N
    • Serial Platform Flash
    • Intel Strata Flash E28F128 (16MB) in 16 bit mode
    • FTDI parallel to USB bridge FT245BM
    • 4 segment LED display
    Short dongle user guide by coreboot.org:
    http://www.coreboot.org/Artecgroup_programmable_LPC_dongle


    Block diagram

    Status

    • HW cvs tag HWVersion_1_0 released (HW code 3)
    • Software cvs tag SoftVersion_1_1 released (dongle.py script version 1.1)
    • HW/Software bundle cvs tag version_1_4 released (bug fixes and added LPC Firmware hub [FWH] read). Contains HW version code 4 and dongle.py script version 2.0
    • HW/Software bundle cvs tag version_1_5 released (Added Post code logger hardware, fast block read hardware and fast read flow control hardware. Updated software to support all the new hardware and older HW in legacy mode). Contains HW version code 5 and dongle.py script version 2.5

    Downloads

    Hardware, software and Quartus project bundle for v5 hardware
    http://www.opencores.org/cvsget.cgi/usb_dongle_fpga/release/usb_dongle_v5_web_release.zip

    Datasheet for v5 hardware
    http://www.opencores.org/cvsget.cgi/usb_dongle_fpga/release/dongle_v5_datasheet_ver1_09.pdf

    Software and datasheet bundle for v5 hardware
    http://www.opencores.org/cvsget.cgi/usb_dongle_fpga/release/DongleTool_2_5.zip

    ALTERA EPCS configuration memory programmer tool (needs python and pyParallel), dongle v5 binary and diagram of ByteBlaster II hardware (older Altera cables like ByteBlaster MV won't work)
    http://www.opencores.org/cvsget.cgi/usb_dongle_fpga/release/EPCS_update_tool.zip

    LPC Dongle AD67441103 PCB schematic
    http://www.opencores.org/cvsget.cgi/usb_dongle_fpga/doc/441103_DONGLE_SCHEMATIC.pdf

    LPC Dongle AD67441104 PCB schematic
    http://www.opencores.org/cvsget.cgi/usb_dongle_fpga/doc/441104_DONGLE_SCHEMATIC.pdf


     

     
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