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OpenRisc Development Board: Overview
Description
Opensource OpenRisc Development Board. All CADsoft Eagle design files available to recreate the board using EagleLite, a freeware PCB design tool. Uses the largest Cyclone 2 device available in a QFP package, thus allowing larger RTL designs to be ported, and at the same time allowing easier PCB design and board assembly. Board design is double sided, and can be manufactured using low cost batch PCB services. But despite only being double layer, it has an almost continuous bottom side ground plane.
A complete system consists of two separate boards;
- Main FPGA board that contains the FPGA, SDRAM, regulators, Santa Cruz expansion header, and Support board expansion header.
- Support board containing SD card slot, SPI flash, C8051, fpgaConfig header, JTAG header, OpenRisc debug header and RS-232 DB9 connector.
A complete FPGA project is available for the board set. This includes a minimal OR1K, SDRAM memory controller, UART peripheral, and SD memory interface. Simulation is possible using Icarus Verilog simulator, and the design can be compiled under Altera Quartus.
Software is available to demonstrate copying a software image file from SD flash memory to SDRAM, and then executing the copied image.
See fpgaConfig project for details of configuring FPGA from SD flash memory:
http://www.opencores.org/projects.cgi/web/fpgaconfig/overview
You can use this project as a basis for a compact OpenRisc implementation. A complete OpenRisc implementation requires just an FPGA, SDRAM, microSD card, and a tiny C8051.
Features
Status
- OR1K running on board, and able to copy software image from SD flash TO SDRAM, and execute.
- Support for USB and SD/SPI flash Santa Cruz daughter cards.
- Software projects for SDRAM memory test, SD memory test, USB loop back test, and USB mouse emulation.
- Full Icarus simulation of complete OpenRISC system, including software
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