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Bluespec MD6 : Overview Details Name: bluespec_md6 Created: 06-Aug-2008 09:06:45 Updated: 28-Oct-2008 18:11:06 CVS: browse Other project properties Category :: Crypto core Language :: Other Phaze :: FPGA proven Development status :: Beta Project maintainers Kermin Fleming Statistics view Features Latency insensitive design Should be portable to most bus architectures/platforms Easily amenable to multi-clock domain extension Support for long burst transfers Configurable number of compression cores, compression core parallelism Status This project is under on-going development as we seek to explore and to improve the architecture of the implementation. We have demonstrated this architecture on the Xilink XUP board, on which we have obtained throughputs in excess of 233 MB/s for MD6-512