| Date |
News |
| 11-Nov-2008 |
GDB 6.8 issue 2 now available as a source code patch for the standard GDB 6.8 distribution here. This version supports the GDB Remote Serial Protocol and complements the release of Or1ksim 0.3.0rc2. |
| 11-Nov-2008 |
Changes commited to CVS |
| 11-Nov-2008 |
Or1ksim 0.3.0 release candidate 2 now available for download here. This now supports the GDB Remote Serial Protocol. You are encouraged to give this a trial and report any issues to the OpenRISC mailing list. Objective remains a stable release before the end of the year. |
| 11-Nov-2008 |
Changes commited to CVS |
| 12-Oct-2008 |
Or1ksim 0.3.0 release candidate 1 now available for download here. You are encouraged to give this a trial and report any issues to the OpenRISC mailing list. Objective is a stable release before the end of the year.
|
| 12-Oct-2008 |
Changes commited to CVS |
| 31-Aug-2008 |
The source files and convenience patches for GDB 6.8 for the OpenRISC 1000 have been committed to CVS. Feedback via the OpenRISC mailing list and bug reports via the tracker are encouraged.
|
| 31-Aug-2008 |
Changes commited to CVS |
| 14-May-2008 |
We are currently working on updating the OR1200 and its toolchain. More information will be presented shortly. |
| 26-May-2006 |
Changes commited to CVS |
| 03-Mar-2006 |
Vivace Semiconductor's roadmap, unveiled at a venture capital event in San Francisco, multimedia chips that will run Linux 2.6 on a "Vivid Media" processor that integrates an OpenRISC 1200 core with a collection of engines allowing multiple media functions to be executed on a single silicon die.
|
| 22-Jan-2006 |
Changes commited to CVS |
| 13-Dec-2004 |
OpenRisc 1200 on a Celoxica RC203 board full source code imported to CVS |
| 22-Oct-2004 |
Changes commited to CVS |
| 29-Aug-2004 |
OpenRISC 1200 implementation in single-mask ViaMask Structured ASIC. A good alternative to FPGAs because you get more MHz and a unit price is much lower. And a good alternative to standard cell implementations because in the NRE you can save $1mio and turn around time is much shorter. More information. |
| 22-Jul-2004 |
Changes commited to CVS |
| 05-Apr-2004 |
OR1200 branch_qmem got merged into OR1200 main source tree. Developments done in last 9 months are available as default (HEAD) revision and tagged as rel_27. |
| 05-Apr-2004 |
Changes commited to CVS |
| 26-Mar-2004 |
Between Apr 3rd and Apr 5th 2004 in San Jose, CA it is possible to see openrisc chip running Linux and a web server. More information. |
| 26-Mar-2004 |
Changes commited to CVS |
| 18-Mar-2004 |
Tutorials on the OpenRISC implementation on Xilinx and Altera FPGA boards. Very useful for beginners, a must read for everyone wanting to implement OpenRISC based system on a FPGA for the first time. Also features tutorial how to build the OpenRISC GNU toolchain. Credits go to Resarch Group Digital Techniques, Hogeschool voor Wetenschap & Kunst. |
| 02-Dec-2003 |
More information on the Flextronics Semiconductor OR1200 chip. Live demos available in California between Dec 8th and Dec 15th. |
| 29-Aug-2003 |
Flextronics Semiconductor built a SoC with OR1200, Ethernet 10/100 MAC, PCI 32 33/66, UART16550 and memory interface. Pictures of the chip from top and bottom side. More information will be available later. |
| 15-Jun-2003 |
How is California based company Rosum successfully using OR1200 in their positioning system SoC ASIC. Success story.
|
| 04-Jun-2003 |
Swedish magazine Elektroniktidningen published two articles about OpenCores and OpenRISC. Article 1 and Article 2. |
| 15-Apr-2003 |
GNU toolchain and DDD are now also available for MS Windows/Cygwin environment. To download Cygwin package, go to GNU Toolchain port page. |
| 20-Mar-2003 |
How Swedish company VOXI AB successfully used OR1200 in their speech recognition system. Success story. |
| 16-Dec-2002 |
EE Times In Focus article about OR1200 based SoC and embedded Linux. |
| 09-Dec-2002 |
New web section has been added, ORPsoc, with some nice pictures. |
| 09-Dec-2002 |
OR1200 RTL now also (optionally, disabled by default) supports WISHBONE B3 specification. |
| 12-Nov-2002 |
If you have 5 minutes, gives us some feedback by completing the OpenRISC survey. |
| 30-Oct-2002 |
Support for BIST has been added via special BIST scan chain. Right now special BIST wrapper needs to be used, at the moment this is only supported for Virtual Silicon RAMs. |
| 08-Sep-2002 |
Optional l.addc/l.addic and l.div/l.divu instructions have been added to OR1200 RTL. At the time of writing this l.addc/l.addic are not generated by or32 C compiler, but l.div/l.divu are. However if you want to use l.div/l.divu you need to install the latest or32 binutils because encoding of l.div/l.divu changed. |
| 02-Sep-2002 |
The OR1200 IP core has been chosen by Flextronics Semiconductor, proven in FPGA technology and integrated into a Flextronics' design. Flextronics can offer commercial design services to companies that want to use this IP in their products - for more information fill out this questionnaire. |
| 22-Aug-2002 |
OR1200 RTL now has a configurable store buffer that speeds store instructions. It has been tested in orp_soc environment. Typical increase in performance is 20%. |
| 19-Aug-2002 |
uClinux is now compliant with ORP architecture. |
| 18-Aug-2002 |
Explanation of ORP has been added under ORPmon. |
| 16-Aug-2002 |
or1ksim/testbench is now completely functional (you can do 'make check' and it shouldn't fail). Test cases in testbench are now ORP compliant. |
| 16-Aug-2002 |
ATS has been greatly enhanced. Now there are two targets: or32-uclinux and or32-rtems. First with uClibc and second with newlib. Also uClinux is now built and simulated. Additionally information about last working toolchain/OS are provided (beside status of the current software in the CVS). ATS scripts are also provided. |
| 02-Aug-2002 |
Today we started news section. For start ATS is back online. In the future more items will be added to ATS. |
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