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Personal page of Ovidiu Lupas
| Username | olupas |
| Fullname | Ovidiu Lupas |
| Email | |
| City | Ottawa |
| State | Ontario |
| Country | CA |
| Account created | 25-Sep-2001 12:01:23 |
| Last logged in | 27-Feb-2004 22:16:10 |
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Skils
VHDL
Verilog
mixed-signal board level design
high-speed digital design
Projects
Serial UART
Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication is very common that almost every machine understands it.Also, for OCRP-1, we needed a way of communication with a host computer, to make it available over the net.
OCRP-2 board
penCores Reference Platform 2 (OCRP-2) is full-size length add-in PCI board. It includes two FPGA chips, video D/A and A/D converters, SDRAM memory, FLASH memory, PLD chip, USB, EIA232 and Ethernet PHY chips. It is designed for a debugging and verification process for several of our cores. See a block diagram for details.
OCRP-1 board
OpenCores Reference Platform 1 (OCRP-1) standalone board was designed as a common prototype platform for testing our IP cores. It has a central FPGA for evaluating and testing IP cores, I/O capabilities, DRAM and FLASH memory. It also has several I/O, JTAG and expansion connectors. It even has real-time clock and a battery. Current PCBs have four layers.
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