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Personal page of Geir Drange
| Username | gedra |
| Fullname | Geir Drange |
| Email | gedra@s... |
| Country | Norway |
| Account created | 05-Jan-2004 08:14:30 |
| Last logged in | 02-Feb-2008 11:45:32 |
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Skils
Electronics design
Embedded SW, RTOS, C programming
FPGA/VHDL design
HW architecture and system design
Fiber optics communication (SDH, SONET, ATM, Ethernet)
Signal processing
Projects
SpaceWire Interface
SpaceWire is a standard for high-speed links and networks, defined by the European Cooperation for Space Standardization ECSS-E50-12A standard. It is intended for use onboard spacecraft.This is a Wishbone compliant interface to SpaceWire networks.
Ultimate CRC
Ultimate CRC is a CRC generator/checker. Using generics it can be configured for any polynomial, data width and initialization value, using either serial or parallel implementation, synchronous or asynchronous reset.
Random Number Generator Library
A library of functions to generate random numbers with different distributions. The functions are intended for use in VHDL test benches where random data is required.
I2S Interface
The I2S bus is an industry standard three-wire interface for streaming stereo audio between devices, typically between a cpu/dsp and a DAC/ADC. This core implements I2S transmitter and receiver.
SPDIF Interface
An interface between the Wishbone bus and the SPDIF IEC958 "Digital audio interface". Separate transmitter and receiver. Dual sample buffers of configurable size. Access to channel status and subcode information. Configurable clocking.
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