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Personal page of Daniel Koethe
| Username | dkoethe |
| Fullname | Daniel Koethe |
| Email | dkoethe@w... |
| City | Chemnitz |
| State | Saxonia |
| Country | DE |
| Account created | 19-Nov-2007 18:18:10 |
| Last logged in | 27-Aug-2008 13:41:38 |
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Skils
Hardware Design Engineer
Projects
OPB PSRAM Controller
Memory Controller to acess a pseudo static ram in synchronous mode.
OPB SPI Slave
The OPB SPI-Slave Core is full configurable and support DMA-Transfers to write or read data directly to a memory.
The SPI-Slave receive/transmit Data to a SPI-Master, for example a DSP or processor. The SPI-Clock and OPB-Bus clocks are complete independent and data is buffered in two asynchronous fifos.
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