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    OpenCores and general hardware news

    Archive contains 95 news of selected type.

    News type:
    < prev   1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10   next >

    New FPGA Configuration Scheme posted by Steve Fielding 29-Apr-2007
    SPIFlash FPGA Config enables you to configure Altera and Xilinx FPGAs using SPI flash and a small micro-controller. This is a very compact, low cost solution, with full support for on board flash programming, and fail safe in-field upgrades. Future upgrades will support, system watchdog, I2C accessible ADC and DAC, and system power control.
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    New aeMB Core Available posted by Shawn Tan 09-Mar-2007
    The aeMB is a clean room implementation of an EDK 2.1 compatible Microblaze processor core. A new design for the aeMB core is now available. This is a complete rewrite that addresses some major problems with the previous core.
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    ALU with selectable inputs and outputs posted by Dragos Constantin Doncean 29-Jan-2007
    It's about a simple core containing an ALU with selectable inputs and outputs. The design itself will be suited for Verilog beginners. The design is a little more complex than the ones presented in Verilog books. Improved tests will be a very good introduction to design verification concepts like BFMs, monitors, collectors and checkers.
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    New AE18 Available posted by Shawn Tan 29-Dec-2006
    A new version of the AE18 core is now available in CVS. It is a PIC18 software compatible core and is WISHBONE compliant. This is a complete rewrite and not based on the older code.
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    SPI Flash Controller core posted by Johannes Hausensteiner
    source: http://diycalculator.pcl.at
    01-Dec-2006
    I posted the SPI Flash Controller which I designed for a project I am working on to the OpenCores CVS server.
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