LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Browse news    

    OpenCores and general hardware news

    Archive contains 99 news of selected type.

    News type:
    < prev   10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20   next >

    USB 1.1 Function IP Core Released posted by Rudolf Usselmann
    source: OpenCores/ASICS.ws
    19-Sep-2002
    Today ASICS.ws released it's USB 1.1 IP core. This is the 4th IP core from ASICS.ws in the last 4 days ! Based on the USB 2.0 IP Core, this version gets rid of the requirement for a micro-controller/CPU and performs all USB enumeration in hardware. For more information please visit: http://www.opencores.org/projects/usb1_funct/
    Top
     
    OpenCores releases WISHBONE Rev.B3 specifications posted by Richard Herveille
    source: OpenCores
    07-Sep-2002
    OpenCores anounced today the release of the WISHBONE System-on-Chip Interconnect Architecture Rev.B3 specifications. Go to the WISHBONE pages to download a copy.
    Top
     
    scARM v0.1 is released now! posted by Aaron Tao Zhong 05-Sep-2002
    It can be used as an ARM simulator. See scARM project page for details..
    Top
     
    Musketeer Microcontroller IP Delivery System posted by Jerry D. Harthcock
    source: QuickCores
    30-Aug-2002
    Microcontroller IP Delivery System on 28-pin, .600" postage stamp features Actel ProASIC+ re-programmable FPGA, built-in programming voltages and LDOs, built-in JTAG boundary scan controller, JTAG real-time debugger, device programmer, RS-232, DAC/ADC. http://www.quickcores.com
    Top
     
    OpenCores Coding Guidelines posted by Damjan Lampret 16-Aug-2002
    Updated version of OpenCores Coding Guidelines (PDF, 271KB) is available. All new designs should follow these guidelines in order to improve IP reuse and ease integration of different OpenCores IPs.
    Top
     

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.