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Message
From: cvs at opencores.org<cvs@o...>
Date: Mon Jun 30 18:15:24 CEST 2008
Subject: [cvs-checkins] MODIFIED: mcu8 ...
Date: 00/08/06 30:18:15 Modified: mcu8 Makefile
Log:
ut and ucf files added
Revision Changes Path
1.2 mcu8/Makefile
http://www.opencores.org/cvsweb.shtml/mcu8/Makefile.diff?r1=1.1&r2=1.2
(In the diff below, changes in quantity of whitespace are not shown.)
Index: Makefile
===================================================================
RCS file: /cvsroot/dimo/mcu8/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- Makefile 23 Jun 2008 19:57:52 -0000 1.1
+++ Makefile 30 Jun 2008 16:15:23 -0000 1.2
@@ -4,9 +4,9 @@
# Don't forget to execute "source bin/load_modules" manual from the shell #
##############################################################################################
-TOP=processor#change to the name of the TOP-Entity
+TOP=processor_E#change to the name of the TOP-Entity
DEVICE=xc3s4000-fg676-4#change to the device id found on the chip
-#VHDLSYNFILES=src/processor_E.vhd src/processor.model.vhd src/cpu_types.vhd src/ram.vhd src/rom.vhd #list all vhdl files in the project that have to be synthesized
+#VHDLSYNFILES=src/cpu_types.vhd src/components.vhd src/processor_E.vhd src/processor.model.vhd src/cpu_types.vhd src/ram.vhd src/rom.vhd #list all vhdl files in the project that have to be synthesized
VHDLSYNFILES=src/cpu_types.vhd src/alu.vhd src/control.vhd src/pc.vhd src/ram_control.vhd src/reg.vhd src/components.vhd src/processor_E.vhd src/ram.vhd src/rom.vhd
OPTMODE=Speed
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