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Message
From: cvs at opencores.org<cvs@o...>
Date: Fri May 30 16:02:50 CEST 2008
Subject: [cvs-checkins] MODIFIED: aemb ...
Date: 00/08/05 30:16:02 Modified: aemb/sim/verilog edk32.v
Log:
updated to new iversim compatibility
Revision Changes Path
1.13 aemb/sim/verilog/edk32.v
http://www.opencores.org/cvsweb.shtml/aemb/sim/verilog/edk32.v.diff?r1=1.12&r2=1.13
(In the diff below, changes in quantity of whitespace are not shown.)
Index: edk32.v
===================================================================
RCS file: /cvsroot/sybreon/aemb/sim/verilog/edk32.v,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -b -r1.12 -r1.13
--- edk32.v 23 Dec 2007 20:40:51 -0000 1.12
+++ edk32.v 30 May 2008 14:02:49 -0000 1.13
@@ -1,4 +1,4 @@
-/* $Id: edk32.v,v 1.12 2007/12/23 20:40:51 sybreon Exp $
+/* $Id: edk32.v,v 1.13 2008/05/30 14:02:49 sybreon Exp $
**
** AEMB EDK 3.2 Compatible Core TEST
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...>
@@ -19,12 +19,10 @@
** License along with AEMB. If not, see <http://www.gnu.org/licenses/>.
*/
-`define AEMB_SIMULATION_KERNEL
+`include "random.v"
module edk32 ();
-`include "random.v"
-
// INITIAL SETUP //////////////////////////////////////////////////////
reg sys_clk_i, sys_rst_i, sys_int_i, sys_exc_i;
@@ -36,29 +34,22 @@
always #5 sys_clk_i = ~sys_clk_i;
initial begin
- //$dumpfile("dump.vcd");
- //$dumpvars(1,dut);
- end
+ `ifdef VCD_DUMP
+ $dumpfile("dump.vcd");
+ $dumpvars(1,dut);
+ `endif
- initial begin
- seed = randseed;
+ //seed = `randseed;
theend = 0;
svc = 0;
- sys_clk_i = $random(seed);
+ sys_clk_i = $random(`randseed);
sys_rst_i = 1;
sys_int_i = 0;
sys_exc_i = 0;
#50 sys_rst_i = 0;
- end
-
- initial fork
- //inttime $display("FSADFASDFSDAF");
- //#10000 sys_int_i = 1;
- //#1100 sys_int_i = 0;
- //#100000 $displayh("\nTest Completed.");
- //#4000 $finish;
- join
+ #40000000 $displayh("\n*** TIMEOUT ",$stime," ***"); $finish;
+ end
// FAKE MEMORY ////////////////////////////////////////////////////////
@@ -246,6 +237,9 @@
/*
$Log: edk32.v,v $
+ Revision 1.13 2008/05/30 14:02:49 sybreon
+ updated to new iversim compatibility
+
Revision 1.12 2007/12/23 20:40:51 sybreon
Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models.
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