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Message
From: cvs at opencores.org<cvs@o...>
Date: Tue Apr 29 00:10:13 CEST 2008
Subject: [cvs-checkins] MODIFIED: t48 ...
Date: 00/08/04 29:00:10 Modified: t48/bench/vhdl tb_t8048.vhd
Log:
decouple bidir port T0 from P1
fixes testcase black_box/tx/t0
Revision Changes Path
1.8 t48/bench/vhdl/tb_t8048.vhd
http://www.opencores.org/cvsweb.shtml/t48/bench/vhdl/tb_t8048.vhd.diff?r1=1.7&r2=1.8
(In the diff below, changes in quantity of whitespace are not shown.)
Index: tb_t8048.vhd
===================================================================
RCS file: /cvsroot/arniml/t48/bench/vhdl/tb_t8048.vhd,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -b -r1.7 -r1.8
--- tb_t8048.vhd 24 Jun 2006 00:51:50 -0000 1.7
+++ tb_t8048.vhd 28 Apr 2008 22:10:13 -0000 1.8
@@ -2,7 +2,7 @@
--
-- The testbench for t8048.
--
--- $Id: tb_t8048.vhd,v 1.7 2006/06/24 00:51:50 arniml Exp $
+-- $Id: tb_t8048.vhd,v 1.8 2008/04/28 22:10:13 arniml Exp $
--
-- Copyright (c) 2004, Arnim Laeuger (arniml@o...)
--
@@ -88,6 +88,8 @@
signal psen_n_s : std_logic;
signal prog_n_s : std_logic;
+ signal t0_b : std_logic;
+
signal p1_b : std_logic_vector( 7 downto 0);
signal p2_b : std_logic_vector( 7 downto 0);
@@ -151,7 +153,7 @@
port map (
xtal_i => xtal_s,
reset_n_i => res_n_s,
- t0_b => p1_b(0),
+ t0_b => t0_b,
int_n_i => int_n_s,
ea_i => zero_s,
rd_n_o => rd_n_s,
@@ -209,6 +211,8 @@
--
-----------------------------------------------------------------------------
+ t0_b <= p1_b(0);
+
-----------------------------------------------------------------------------
-- The clock generator
--
@@ -296,6 +300,10 @@
-- File History:
--
-- $Log: tb_t8048.vhd,v $
+-- Revision 1.8 2008/04/28 22:10:13 arniml
+-- decouple bidir port T0 from P1
+-- fixes testcase black_box/tx/t0
+--
-- Revision 1.7 2006/06/24 00:51:50 arniml
-- comment added about lower 1k of external ROM
--
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