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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Mon Apr 28 22:29:16 CEST 2008
    Subject: [cvs-checkins] MODIFIED: aemb ...
    Top
    Date: 00/08/04 28:22:29

    Modified: aemb/sw/cc/aemb core.hh heap.hh hook.hh msr.hh stack.hh
    stdio.hh thread.hh
    Added: aemb/sw/cc/aemb semaphore.hh
    Log:
    Made files C compatible under C++.


    Revision Changes Path
    1.4 aemb/sw/cc/aemb/core.hh

    http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/core.hh.diff?r1=1.3&r2=1.4

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: core.hh
    ===================================================================
    RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/core.hh,v
    retrieving revision 1.3
    retrieving revision 1.4
    diff -u -b -r1.3 -r1.4
    --- core.hh 27 Apr 2008 16:33:42 -0000 1.3
    +++ core.hh 28 Apr 2008 20:29:15 -0000 1.4
    @@ -1,4 +1,4 @@
    -/* $Id: core.hh,v 1.3 2008/04/27 16:33:42 sybreon Exp $
    +/* $Id: core.hh,v 1.4 2008/04/28 20:29:15 sybreon Exp $
    **
    ** AEMB2 HI-PERFORMANCE CPU
    ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...>
    @@ -30,22 +30,18 @@
    #include "aemb/thread.hh"
    #include "aemb/hook.hh"
    #include "aemb/stdio.hh"
    +#include "aemb/semaphore.hh"

    -#ifndef AEMB_CORE_HH
    -#define AEMB_CORE_HH
    -
    -/**
    -Unique namespace for all aemb library functions
    -*/
    -#ifdef __cplusplus
    -namespace aemb {
    -}
    -#endif
    +#ifndef _AEMB_CORE_HH
    +#define _AEMB_CORE_HH

    #endif

    /*
    $Log: core.hh,v $
    + Revision 1.4 2008/04/28 20:29:15 sybreon
    + Made files C compatible under C++.
    +
    Revision 1.3 2008/04/27 16:33:42 sybreon
    License change to GPL3.




    1.6 aemb/sw/cc/aemb/heap.hh

    http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/heap.hh.diff?r1=1.5&r2=1.6

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: heap.hh
    ===================================================================
    RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/heap.hh,v
    retrieving revision 1.5
    retrieving revision 1.6
    diff -u -b -r1.5 -r1.6
    --- heap.hh 27 Apr 2008 16:33:42 -0000 1.5
    +++ heap.hh 28 Apr 2008 20:29:15 -0000 1.6
    @@ -1,4 +1,4 @@
    -/* $Id: heap.hh,v 1.5 2008/04/27 16:33:42 sybreon Exp $
    +/* $Id: heap.hh,v 1.6 2008/04/28 20:29:15 sybreon Exp $
    **
    ** AEMB2 HI-PERFORMANCE CPU
    ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...>
    @@ -24,11 +24,11 @@
    @file heap.hh
    */

    -#ifndef AEMB_HEAP_HH
    -#define AEMB_HEAP_HH
    +#ifndef _AEMB_HEAP_HH
    +#define _AEMB_HEAP_HH

    #ifdef __cplusplus
    -namespace aemb {
    +extern "C" {
    #endif

    /**
    @@ -36,7 +36,7 @@
    @return heap size
    */

    - inline int getHeapSize()
    + inline int aembGetHeapSize() { int tmp; asm ("la %0, r0, _HEAP_SIZE":"=r"(tmp)); @@ -48,7 +48,7 @@ @return heap end */ - inline int getHeapEnd() + inline int aembGetHeapEnd() { int tmp; asm ("la %0, r0, _heap_end":"=r"(tmp)); @@ -60,7 +60,7 @@ @return heap top */ - inline int getHeapTop() + inline int aembGetHeapTop() { int tmp; asm ("la %0, r0, _heap":"=r"(tmp)); @@ -75,6 +75,9 @@ /* $Log: heap.hh,v $ + Revision 1.6 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + Revision 1.5 2008/04/27 16:33:42 sybreon License change to GPL3. 1.10 aemb/sw/cc/aemb/hook.hh http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/hook.hh.diff?r1=1.9&r2=1.10 (In the diff below, changes in quantity of whitespace are not shown.) Index: hook.hh =================================================================== RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/hook.hh,v retrieving revision 1.9 retrieving revision 1.10 diff -u -b -r1.9 -r1.10 --- hook.hh 27 Apr 2008 16:33:42 -0000 1.9 +++ hook.hh 28 Apr 2008 20:29:15 -0000 1.10 @@ -1,4 +1,4 @@ -/* $Id: hook.hh,v 1.9 2008/04/27 16:33:42 sybreon Exp $ +/* $Id: hook.hh,v 1.10 2008/04/28 20:29:15 sybreon Exp $ ** ** AEMB2 HI-PERFORMANCE CPU ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...> @@ -31,12 +31,11 @@ #include "aemb/heap.hh" #include "aemb/thread.hh" -#ifndef AEMB_HOOK_HH -#define AEMB_HOOK_HH +#ifndef _AEMB_HOOK_HH +#define _AEMB_HOOK_HH #ifdef __cplusplus -namespace aemb { - extern "C" { +extern "C" { #endif void _program_init(); @@ -48,10 +47,6 @@ //void __env_lock(struct _reent *reent); //void __env_unlock(struct _reent *reent); -#ifdef __cplusplus - } -#endif - /** Finalisation hook @@ -62,16 +57,15 @@ void _program_clean() { - _mtx_lock(); // enter critical section + _aembLockMTX(); // enter critical section - // unify the stack backwards for thread 1 - if (isThread0()) + // unify the stack backwards + if (aembIsThread0()) { - // TODO: Unify the stack - setStack(getStack() + (getStackSize() >> 1)); + aembSetStack(aembGetStack() + (aembGetStackSize() >> 1)); } - _mtx_free(); // exit critical section + _aembFreeMTX(); // exit critical section } /** @@ -84,22 +78,22 @@ void _program_init() { - _mtx_lock(); // enter critical section + _aembLockMTX(); // enter critical section // split and shift the stack for thread 1 - if (isThread0()) // main thread + if (aembIsThread0()) // main thread { // NOTE: Dupe the stack otherwise it will FAIL! - int oldstk = getStack(); - int newstk = setStack(getStack() - (getStackSize() >> 1)); - dupStack((unsigned int *)newstk, + int oldstk = aembGetStack(); + int newstk = aembSetStack(aembGetStack() - (aembGetStackSize() >> 1)); + aembDupStack((unsigned int *)newstk, (unsigned int *)oldstk, - (unsigned int *)getStackTop()); - _mtx_free(); // exit critical section + (unsigned int *)aembGetStackTop()); + _aembFreeMTX(); // exit critical section while (1) asm volatile ("nop"); // lock thread } - _mtx_free(); // exit critical section + _aembFreeMTX(); // exit critical section } semaphore __malloc_mutex = 1; @@ -113,7 +107,7 @@ void __malloc_lock(struct _reent *reent) { - _mtx_lock(); + _aembLockMTX(); } /** @@ -125,7 +119,7 @@ void __malloc_unlock(struct _reent *reent) { - _mtx_free(); + _aembFreeMTX(); } #ifdef __cplusplus @@ -143,6 +137,9 @@ /* $Log: hook.hh,v $ + Revision 1.10 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + Revision 1.9 2008/04/27 16:33:42 sybreon License change to GPL3. 1.9 aemb/sw/cc/aemb/msr.hh http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/msr.hh.diff?r1=1.8&r2=1.9 (In the diff below, changes in quantity of whitespace are not shown.) Index: msr.hh =================================================================== RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/msr.hh,v retrieving revision 1.8 retrieving revision 1.9 diff -u -b -r1.8 -r1.9 --- msr.hh 27 Apr 2008 16:33:42 -0000 1.8 +++ msr.hh 28 Apr 2008 20:29:15 -0000 1.9 @@ -1,4 +1,4 @@ -/* $Id: msr.hh,v 1.8 2008/04/27 16:33:42 sybreon Exp $ +/* $Id: msr.hh,v 1.9 2008/04/28 20:29:15 sybreon Exp $ ** ** AEMB2 HI-PERFORMANCE CPU ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...> @@ -27,27 +27,27 @@ Register. It also contains the bit definitions of the register. */ -#ifndef AEMB_MSR_HH -#define AEMB_MSR_HH +#ifndef _AEMB_MSR_HH +#define _AEMB_MSR_HH // STANDARD BITS -#define MSR_BE (1 << 0) ///< Buslock Enable -#define MSR_IE (1 << 1) ///< Interrupt Enable -#define MSR_C (1 << 2) ///< Arithmetic Carry -#define MSR_BIP (1 << 3) ///< Break in Progress - -#define MSR_ICE (1 << 5) ///< Instruction Cache Enable -#define MSR_DZ (1 << 6) ///< Division by Zero -#define MSR_DCE (1 << 7) ///< Data Cache Enable +#define AEMB_MSR_BE (1 << 0) ///< Buslock Enable +#define AEMB_MSR_IE (1 << 1) ///< Interrupt Enable +#define AEMB_MSR_C (1 << 2) ///< Arithmetic Carry +#define AEMB_MSR_BIP (1 << 3) ///< Break in Progress + +#define AEMB_MSR_ITE (1 << 5) ///< Instruction Cache Enable +#define AEMB_MSR_DZ (1 << 6) ///< Division by Zero +#define AEMB_MSR_DTE (1 << 7) ///< Data Cache Enable // CUSTOM BITS -#define MSR_MTX (1 << 4) ///< Hardware Mutex -#define MSR_PHA (1 << 29) ///< Hardware Thread Phase -#define MSR_HTX (1 << 30) ///< Hardware Threads Extension -#define MSR_CC (1 << 31) ///< Carry Copy +#define AEMB_MSR_MTX (1 << 4) ///< Hardware Mutex +#define AEMB_MSR_PHA (1 << 29) ///< Hardware Thread Phase +#define AEMB_MSR_HTX (1 << 30) ///< Hardware Threads Extension +#define AEMB_MSR_CC (1 << 31) ///< Carry Copy #ifdef __cplusplus -namespace aemb { +extern "C" { #endif /** @@ -55,7 +55,7 @@ @return register contents */ - inline int getMSR() + inline int aembGetMSR() { int rmsr; asm volatile ("mfs %0, rmsr":"=r"(rmsr)); @@ -67,7 +67,7 @@ @param rmsr value to write */ - inline void putMSR(int rmsr) + inline void aembPutMSR(int rmsr) { asm volatile ("mts rmsr, %0"::"r"(rmsr)); } @@ -78,7 +78,7 @@ @return msr value */ - inline int clrMSR(const short rmsk) + inline int aembClrMSR(const short rmsk) { int tmp; //asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(rmsk):"memory"); @@ -91,7 +91,7 @@ @return msr value */ - inline int setMSR(const short rmsk) + inline int aembSetMSR(const short rmsk) { int tmp; //asm volatile ("msrset %0, %1":"=r"(tmp):"K"(rmsk):"memory"); @@ -99,39 +99,51 @@ } /** Enable global interrupts */ - inline void enableInterrupts() + inline int aembEnableInterrupts() { - asm volatile ("msrset r0, %0"::"K"(MSR_IE):"memory"); + int msr; + asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_IE)); + return msr; } /** Disable global interrupts */ - inline void disableInterrupts() + inline int aembDisableInterrupts() { - asm volatile ("msrclr r0, %0"::"K"(MSR_IE)); + int msr; + asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_IE)); + return msr; } /** Enable data caches */ - inline void enableDataCache() + inline int aembEnableDataTag() { - asm volatile ("msrset r0, %0"::"K"(MSR_DCE)); + int msr; + asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_DTE)); + return msr; } /** Disable data caches */ - inline void disableDataCache() + inline int aembDisableDataTag() { - asm volatile ("msrclr r0, %0"::"K"(MSR_DCE)); + int msr; + asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_DTE)); + return msr; } /** Enable inst caches */ - inline void enableInstCache() + inline int aembEnableInstTag() { - asm volatile ("msrset r0, %0"::"K"(MSR_ICE)); + int msr; + asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_ITE)); + return msr; } /** Disable inst caches */ - inline void disableInstCache() + inline int aembDisableInstTag() { - asm volatile ("msrclr r0, %0"::"K"(MSR_ICE)); + int msr; + asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_ITE)); + return msr; } #ifdef __cplusplus @@ -142,6 +154,9 @@ /* $Log: msr.hh,v $ + Revision 1.9 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + Revision 1.8 2008/04/27 16:33:42 sybreon License change to GPL3. 1.8 aemb/sw/cc/aemb/stack.hh http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/stack.hh.diff?r1=1.7&r2=1.8 (In the diff below, changes in quantity of whitespace are not shown.) Index: stack.hh =================================================================== RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/stack.hh,v retrieving revision 1.7 retrieving revision 1.8 diff -u -b -r1.7 -r1.8 --- stack.hh 27 Apr 2008 16:33:42 -0000 1.7 +++ stack.hh 28 Apr 2008 20:29:15 -0000 1.8 @@ -1,4 +1,4 @@ -/* $Id: stack.hh,v 1.7 2008/04/27 16:33:42 sybreon Exp $ +/* $Id: stack.hh,v 1.8 2008/04/28 20:29:15 sybreon Exp $ ** ** AEMB2 HI-PERFORMANCE CPU ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...> @@ -24,11 +24,11 @@ @file stack.hh */ -#ifndef AEMB_STACK_HH -#define AEMB_STACK_HH +#ifndef _AEMB_STACK_HH +#define _AEMB_STACK_HH #ifdef __cplusplus -namespace aemb { +extern "C" { #endif /** @@ -36,7 +36,7 @@ @return size of stack */ - inline int getStackSize() + inline int aembGetStackSize() { int tmp; asm ("la %0, r0, _STACK_SIZE":"=r"(tmp)); @@ -49,7 +49,7 @@ @return end of stack */ - inline int getStackEnd() + inline int aembGetStackEnd() { int tmp; asm ("la %0, r0, _stack_end":"=r"(tmp)); @@ -62,7 +62,7 @@ @return top of stack */ - inline int getStackTop() + inline int aembGetStackTop() { int tmp; asm ("la %0, r0, _stack":"=r"(tmp)); @@ -74,7 +74,7 @@ @return stack pointer */ - inline int getStack() + inline int aembGetStack() { int tmp; asm ("addk %0, r0, r1":"=r"(tmp)); @@ -87,7 +87,7 @@ @return new stack pointer */ - inline int setStack(int stk) + inline int aembSetStack(int stk) { asm ("addk r1, r0, %0"::"r"(stk)); return stk; @@ -100,13 +100,12 @@ @param endp end of the stack */ - inline void dupStack(unsigned int *newp, unsigned int *oldp, unsigned int *endp) + inline void aembDupStack(unsigned int *newp, unsigned int *oldp, unsigned int *endp) { while (oldp < endp) { // copy the stack content *newp = *oldp; - // this increments 1 word (not 1 byte) newp++; oldp++; @@ -121,6 +120,9 @@ /* $Log: stack.hh,v $ + Revision 1.8 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + Revision 1.7 2008/04/27 16:33:42 sybreon License change to GPL3. 1.5 aemb/sw/cc/aemb/stdio.hh http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/stdio.hh.diff?r1=1.4&r2=1.5 (In the diff below, changes in quantity of whitespace are not shown.) Index: stdio.hh =================================================================== RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/stdio.hh,v retrieving revision 1.4 retrieving revision 1.5 diff -u -b -r1.4 -r1.5 --- stdio.hh 27 Apr 2008 16:33:42 -0000 1.4 +++ stdio.hh 28 Apr 2008 20:29:15 -0000 1.5 @@ -1,4 +1,4 @@ -/* $Id: stdio.hh,v 1.4 2008/04/27 16:33:42 sybreon Exp $ +/* $Id: stdio.hh,v 1.5 2008/04/28 20:29:15 sybreon Exp $ ** ** AEMB2 HI-PERFORMANCE CPU ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...> @@ -29,8 +29,8 @@ inlined. */ -#ifndef AEMB_STDIO_HH -#define AEMB_STDIO_HH +#ifndef _AEMB_STDIO_HH +#define _AEMB_STDIO_HH #ifdef __cplusplus extern "C" { @@ -42,6 +42,7 @@ This is used to output characters to LCD or UART. */ + void outbyte(char c); /** @@ -50,6 +51,7 @@ This is used to read characters in from UART or keyboard. */ + char inbyte(); #ifdef __cplusplus @@ -60,6 +62,9 @@ /* $Log: stdio.hh,v $ + Revision 1.5 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + Revision 1.4 2008/04/27 16:33:42 sybreon License change to GPL3. 1.10 aemb/sw/cc/aemb/thread.hh http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/thread.hh.diff?r1=1.9&r2=1.10 (In the diff below, changes in quantity of whitespace are not shown.) Index: thread.hh =================================================================== RCS file: /cvsroot/sybreon/aemb/sw/cc/aemb/thread.hh,v retrieving revision 1.9 retrieving revision 1.10 diff -u -b -r1.9 -r1.10 --- thread.hh 27 Apr 2008 16:33:42 -0000 1.9 +++ thread.hh 28 Apr 2008 20:29:15 -0000 1.10 @@ -1,4 +1,4 @@ -/* $Id: thread.hh,v 1.9 2008/04/27 16:33:42 sybreon Exp $ +/* $Id: thread.hh,v 1.10 2008/04/28 20:29:15 sybreon Exp $ ** ** AEMB2 HI-PERFORMANCE CPU ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...> @@ -29,11 +29,11 @@ #include "aemb/msr.hh" -#ifndef AEMB_THREAD_HH -#define AEMB_THREAD_HH +#ifndef _AEMB_THREAD_HH +#define _AEMB_THREAD_HH #ifdef __cplusplus -namespace aemb { +extern "C" { #endif /** @@ -41,10 +41,10 @@ @return true if is Thread 1 */ - inline int isThread1() + inline int aembIsThread1() { - int rmsr = getMSR(); - return ((rmsr & MSR_HTX) && (rmsr & MSR_PHA)); + int rmsr = aembGetMSR(); + return ((rmsr & AEMB_MSR_HTX) && (rmsr & AEMB_MSR_PHA)); } /** @@ -52,30 +52,30 @@ @return true if is Thread 0 */ - inline int isThread0() + inline int aembIsThread0() { - int rmsr = getMSR(); - return ((rmsr & MSR_HTX) && (!(rmsr & MSR_PHA))); + int rmsr = aembGetMSR(); + return ((rmsr & AEMB_MSR_HTX) && (!(rmsr & AEMB_MSR_PHA))); } /** Checks to see if it is multi-threaded or not. @return true if thread capable */ - inline int isThreaded() + inline int aembIsThreaded() { - int rmsr = getMSR(); - return (rmsr & MSR_HTX); + int rmsr = aembGetMSR(); + return (rmsr & AEMB_MSR_HTX); } /** Hardware Mutex Signal. Unlock the hardware mutex, which is unlocked on reset. */ - inline void _mtx_free() + inline void _aembFreeMTX() { int tmp; - asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(MSR_MTX)); + asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(AEMB_MSR_MTX)); } /** @@ -84,72 +84,14 @@ Waits until the hardware mutex is unlocked. This should be used as part of a larger software mutex mechanism. */ - inline void _mtx_lock() + inline void _aembLockMTX() { int rmsr; do { - asm volatile ("msrset %0, %1":"=r"(rmsr):"K"(MSR_MTX)); - } - while (rmsr & MSR_MTX); - } - - // TODO: Extend this library to include threading mechanisms such as - // semaphores, mutexes and such. - - /** - Semaphore struct. - Presently implemented as software solution but a hardware one may be - required as the threads are hardware. - */ - - typedef int semaphore; - - /** - Software Semaphore Signal. - - Increment the semaphore and run. This is a software mechanism. - */ - inline void signal(volatile semaphore _sem) - { - _mtx_lock(); - _sem++; - _mtx_free(); - } - - /** - Software Semaphore Wait. - - Decrement the semaphore and block if < 0. This is a software - mechanism. - */ - inline void wait(volatile semaphore _sem) - { - _mtx_lock(); - _sem--; - _mtx_free(); - while (_sem < 0); - } - - semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex - semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex - - /** - Implements a simple rendezvous mechanism - */ - - inline void rendezvous() - { - if (isThread1()) - { - wait(__mutex_rendezvous0); - signal(__mutex_rendezvous1); - } - else - { - signal(__mutex_rendezvous0); - wait(__mutex_rendezvous1); + asm volatile ("msrset %0, %1":"=r"(rmsr):"K"(AEMB_MSR_MTX)); } + while (rmsr & AEMB_MSR_MTX); } #ifdef __cplusplus @@ -160,6 +102,9 @@ /* $Log: thread.hh,v $ + Revision 1.10 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + Revision 1.9 2008/04/27 16:33:42 sybreon License change to GPL3. 1.1 aemb/sw/cc/aemb/semaphore.hh http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/aemb/semaphore.hh?rev=1.1&content-type=text/x-cvsweb-markup Index: semaphore.hh =================================================================== /* $Id: semaphore.hh,v 1.1 2008/04/28 20:29:15 sybreon Exp $ ** ** AEMB2 HI-PERFORMANCE CPU ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...> ** ** This file is part of AEMB. ** ** AEMB is free software: you can redistribute it and/or modify it ** under the terms of the GNU General Public License as published by ** the Free Software Foundation, either version 3 of the License, or ** (at your option) any later version. ** ** AEMB is distributed in the hope that it will be useful, but WITHOUT ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ** License for more details. ** ** You should have received a copy of the GNU General Public License ** along with AEMB. If not, see <http://www.gnu.org/licenses/>. */ /** General semaphore library @file semaphore.hh */ #include "aemb/thread.hh" #ifndef _AEMB_SEMAPHORE_HH #define _AEMB_SEMAPHORE_HH #ifdef __cplusplus extern "C" { #endif // TODO: Extend this library to include threading mechanisms such as // semaphores, mutexes and such. /** Semaphore struct. Presently implemented as software solution but a hardware one may be required as the threads are hardware. */ typedef int semaphore; /** Software Semaphore Signal. Increment the semaphore and run. This is a software mechanism. */ inline void aembSignal(volatile semaphore _sem) { _aembLockMTX(); _sem++; _aembFreeMTX(); } /** Software Semaphore Wait. Decrement the semaphore and block if < 0. This is a software mechanism. */ inline void aembWait(volatile semaphore _sem) { _aembLockMTX(); _sem--; _aembFreeMTX(); while (_sem < 0); } semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex /** Implements a simple rendezvous mechanism */ /* inline void aembRendezvous() { if (isThread1()) { wait(__mutex_rendezvous0); signal(__mutex_rendezvous1); } else { signal(__mutex_rendezvous0); wait(__mutex_rendezvous1); } } */ #ifdef __cplusplus } #endif #endif /* $log$ */

     
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