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Message
From: cvs at opencores.org<cvs@o...>
Date: Sun Apr 27 18:04:42 CEST 2008
Subject: [cvs-checkins] MODIFIED: aemb ...
Date: 00/08/04 27:18:04 Modified: aemb/sw/cc literate.hh simboard.hh testbench.cc
Added: aemb/sw/cc corefunc.hh
Log:
Minor cosmetic changes.
Revision Changes Path
1.5 aemb/sw/cc/literate.hh
http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/literate.hh.diff?r1=1.4&r2=1.5
(In the diff below, changes in quantity of whitespace are not shown.)
Index: literate.hh
===================================================================
RCS file: /cvsroot/sybreon/aemb/sw/cc/literate.hh,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- literate.hh 26 Apr 2008 18:07:19 -0000 1.4
+++ literate.hh 27 Apr 2008 16:04:42 -0000 1.5
@@ -1,4 +1,4 @@
-/* $Id: literate.hh,v 1.4 2008/04/26 18:07:19 sybreon Exp $
+/* $Id: literate.hh,v 1.5 2008/04/27 16:04:42 sybreon Exp $
**
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@a...>
@@ -225,5 +225,8 @@
#endif
/*
-$log$
+$Log: literate.hh,v $
+Revision 1.5 2008/04/27 16:04:42 sybreon
+Minor cosmetic changes.
+
*/
1.5 aemb/sw/cc/simboard.hh
http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/simboard.hh.diff?r1=1.4&r2=1.5
(In the diff below, changes in quantity of whitespace are not shown.)
Index: simboard.hh
===================================================================
RCS file: /cvsroot/sybreon/aemb/sw/cc/simboard.hh,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- simboard.hh 26 Apr 2008 19:32:00 -0000 1.4
+++ simboard.hh 27 Apr 2008 16:04:42 -0000 1.5
@@ -1,4 +1,4 @@
-/* $Id: simboard.hh,v 1.4 2008/04/26 19:32:00 sybreon Exp $
+/* $Id: simboard.hh,v 1.5 2008/04/27 16:04:42 sybreon Exp $
**
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@a...>
@@ -38,57 +38,6 @@
using namespace aemb;
#endif
-volatile int intr = -1;
-
-void __attribute__ ((interrupt_handler)) interruptHandler()
-{
- intr = 0; // flag the interrupt service routine
-}
-
-int interruptTest(int timeout)
-{
- enableInterrupts();
- int timer;
- for (timer=0; (timer < timeout) && (intr == -1); ++timer); // delay loop
- disableInterrupts();
- return (intr == 0) ? EXIT_SUCCESS : EXIT_FAILURE;
-}
-
-
-/**
- FSL TEST ROUTINE
-*/
-
-int xslTest (int code)
-{
- // TEST FSL1 ONLY
- int FSL = code;
-
- asm ("PUT %0, RFSL1" :: "r"(FSL));
- asm ("GET %0, RFSL1" : "=r"(FSL));
-
- if (FSL != code) return EXIT_FAILURE;
-
- asm ("PUT %0, RFSL31" :: "r"(FSL));
- asm ("GET %0, RFSL31" : "=r"(FSL));
-
- if (FSL != code) return EXIT_FAILURE;
-
- return EXIT_SUCCESS;
-}
-
-/**
- MALLOC TEST
- Works well with newlib malloc routine. Do some patterned tests.
-*/
-
-int memoryTest(int size)
-{
- void *alloc;
- alloc = malloc(size * sizeof(int)); // allocate 32 byte
- return (alloc == NULL) ? EXIT_FAILURE : EXIT_SUCCESS;
-}
-
/*
I/O FUNCTIONS
*/
@@ -127,6 +76,9 @@
/*
$Log: simboard.hh,v $
+Revision 1.5 2008/04/27 16:04:42 sybreon
+Minor cosmetic changes.
+
Revision 1.4 2008/04/26 19:32:00 sybreon
Made headers C compatible.
1.6 aemb/sw/cc/testbench.cc
http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/testbench.cc.diff?r1=1.5&r2=1.6
(In the diff below, changes in quantity of whitespace are not shown.)
Index: testbench.cc
===================================================================
RCS file: /cvsroot/sybreon/aemb/sw/cc/testbench.cc,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -b -r1.5 -r1.6
--- testbench.cc 26 Apr 2008 19:32:00 -0000 1.5
+++ testbench.cc 27 Apr 2008 16:04:42 -0000 1.6
@@ -1,4 +1,4 @@
-/* $Id: testbench.cc,v 1.5 2008/04/26 19:32:00 sybreon Exp $
+/* $Id: testbench.cc,v 1.6 2008/04/27 16:04:42 sybreon Exp $
**
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@a...>
@@ -18,51 +18,84 @@
** You should have received a copy of the GNU General Public License
** along with AEMB. If not, see <http://www.gnu.org/licenses/>.
*/
+/**
+AEMB Software Verification
+ at file testbench.cc
+
+This programme performs numerical and functional verification of the
+AEMB. It can be compiled by the GCC compiler.
+*/
#include <stdio.h>
#include <stdlib.h>
#include "aemb/core.hh"
#include "literate.hh"
#include "simboard.hh"
+#include "corefunc.hh"
#define MAX_TEST 3
-// run tests
-int main()
+void checkcode(int code)
+{
+ if (code == EXIT_SUCCESS)
+ iprintf("\t\t-PASS-\n");
+ else
+ iprintf("\t\t*FAIL*\n");
+}
+
+void printtest(char *msg)
{
- iprintf("AEMB2 32-bit Microprocessor Core\n");
+ static int count = 1;
+ iprintf("\t%d. %s\n",count++, msg);
+}
- iprintf("\nNumerical Tests\n");
+void numtests()
+{
// *** 1. FIBONACCI ***
- if (fibonacciTest(MAX_TEST) != EXIT_SUCCESS) trap(-1);
- iprintf("1.\tBasic Integer\tPASS\n");
+ printtest("Integer Arithmetic");
+ checkcode(fibonacciTest(MAX_TEST));
// *** 2. EUCLIDEAN ***
- if (euclideanTest(MAX_TEST) != EXIT_SUCCESS) trap(-2);
- iprintf("2.\tExtra Integer\tPASS\n");
+ printtest("Integer Factorisation");
+ checkcode(euclideanTest(MAX_TEST));
// *** 3. NEWTON-RHAPSON ***
- if (newtonTest(MAX_TEST) != EXIT_SUCCESS) trap(-3);
- iprintf("3.\tFloating Point\tPASS\n");
+ printtest("Floating Point Arithmetic");
+ checkcode(newtonTest(MAX_TEST));
- iprintf("\nFunctional Tests\n");
+}
+
+void coretests()
+{
// *** 4. MEMORY-ALLOC ***
- if (memoryTest(MAX_TEST) != EXIT_SUCCESS) trap(-4);
- iprintf("4.\tMemory Alloc\tPASS\n");
+ printtest("Memory Allocation");
+ checkcode(memoryTest(MAX_TEST));
// *** 5. INTERRUPT ***
- iprintf("5.\tInterrupt\tPASS\n");
+ printtest("Hardware Interrupts");
+ checkcode(interruptTest(MAX_TEST));
// *** 6. EXTENSION ***
- iprintf("6.\tExtension\tPASS\n");
+ printtest("Accellerator Link");
+ checkcode(xslTest(MAX_TEST));
+}
+
+// run tests
+int main()
+{
+ iprintf("AEMB2 32-bit Microprocessor Core Tests\n");
+
+ numtests();
+ coretests();
- // *** 9. PASSED ***
- iprintf("\n*** PASSED ***\n");
return EXIT_SUCCESS;
}
/*
$Log: testbench.cc,v $
+ Revision 1.6 2008/04/27 16:04:42 sybreon
+ Minor cosmetic changes.
+
Revision 1.5 2008/04/26 19:32:00 sybreon
Made headers C compatible.
1.1 aemb/sw/cc/corefunc.hh
http://www.opencores.org/cvsweb.shtml/aemb/sw/cc/corefunc.hh?rev=1.1&content-type=text/x-cvsweb-markup
Index: corefunc.hh
===================================================================
/* $Id: corefunc.hh,v 1.1 2008/04/27 16:04:42 sybreon Exp $
**
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@a...>
**
** This file is part of AEMB.
**
** AEMB is free software: you can redistribute it and/or modify it
** under the terms of the GNU General Public License as published by
** the Free Software Foundation, either version 3 of the License, or
** (at your option) any later version.
**
** AEMB is distributed in the hope that it will be useful, but WITHOUT
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
** License for more details.
**
** You should have received a copy of the GNU General Public License
** along with AEMB. If not, see <http://www.gnu.org/licenses/>.
*/
/**
AEMB Software Verification
@file corefunc.hh
These are custom functions written to test certain hardware functions
that cannot be tested through numerical algorithms.
*/
#ifndef COREFUNC_HH
#define COREFUNC_HH
#define MAGIC 0xAE63AE63 // magic number
volatile int intr = -1;
void __attribute__ ((interrupt_handler)) interruptHandler()
{
intr = 0; // flag the interrupt service routine
}
int interruptTest(int timeout)
{
enableInterrupts();
int timer;
for (timer=0; (timer < timeout * 100) && (intr == -1); ++timer); // delay loop
disableInterrupts();
return (intr == 0) ? EXIT_SUCCESS : EXIT_FAILURE;
}
/**
FSL TEST ROUTINE
*/
int xslTest (int code)
{
// TEST FSL1 ONLY
int FSL = code;
asm ("PUT %0, RFSL0" :: "r"(FSL));
asm ("GET %0, RFSL0" : "=r"(FSL));
if (FSL != code) return EXIT_FAILURE;
asm ("PUT %0, RFSL31" :: "r"(FSL));
asm ("GET %0, RFSL31" : "=r"(FSL));
if (FSL != code) return EXIT_FAILURE;
return EXIT_SUCCESS;
}
/**
MALLOC TEST
Works well with newlib malloc routine. Do some patterned tests.
*/
int memoryTest(int size)
{
volatile void *alloc;
int magic;
alloc = malloc(size * sizeof(int)); // allocate 32 byte
if (alloc == NULL)
return EXIT_FAILURE;
*(int *)alloc = MAGIC; // write to memory
magic = *(int *)alloc; // read from memory
return (magic == MAGIC) ? EXIT_SUCCESS : EXIT_FAILURE;
}
#endif
/*
$Log: corefunc.hh,v $
Revision 1.1 2008/04/27 16:04:42 sybreon
Minor cosmetic changes.
*/
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