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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Mon Mar 24 20:34:54 CET 2008
    Subject: [cvs-checkins] MODIFIED: spi_slave ...
    Top
    Date: 00/08/03 24:20:34

    Modified: spi_slave/rtl/vhdl opb_spi_slave_pack.vhd
    Log:
    added constant C_ADR_RX_CRC,C_ADR_TX_CRC,

    added constant C_OPB_CTL_REG_CRC_EN, C_OPB_CTL_REG_CRC_CLR


    Revision Changes Path
    1.4 spi_slave/rtl/vhdl/opb_spi_slave_pack.vhd

    http://www.opencores.org/cvsweb.shtml/spi_slave/rtl/vhdl/opb_spi_slave_pack.vhd.diff?r1=1.3&r2=1.4

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: opb_spi_slave_pack.vhd
    ===================================================================
    RCS file: /cvsroot/dkoethe/spi_slave/rtl/vhdl/opb_spi_slave_pack.vhd,v
    retrieving revision 1.3
    retrieving revision 1.4
    diff -u -b -r1.3 -r1.4
    --- opb_spi_slave_pack.vhd 3 Dec 2007 20:25:44 -0000 1.3
    +++ opb_spi_slave_pack.vhd 24 Mar 2008 19:34:53 -0000 1.4
    @@ -18,6 +18,8 @@
    constant C_ADR_RX_DMA_CTL : std_logic_vector(7 downto 2) := conv_std_logic_vector(16#9#, 6);
    constant C_ADR_RX_DMA_ADDR : std_logic_vector(7 downto 2) := conv_std_logic_vector(16#A#, 6);
    constant C_ADR_RX_DMA_NUM : std_logic_vector(7 downto 2) := conv_std_logic_vector(16#B#, 6);
    + constant C_ADR_RX_CRC : std_logic_vector(7 downto 2) := conv_std_logic_vector(16#C#, 6);
    + constant C_ADR_TX_CRC : std_logic_vector(7 downto 2) := conv_std_logic_vector(16#D#, 6);

    -- XIIF_V123B compatible
    constant C_ADR_DGIE : std_logic_vector(7 downto 2) := conv_std_logic_vector(16#10#, 6);
    @@ -31,13 +33,14 @@

    -- CTL_Register
    -- width
    - constant C_OPB_CTL_REG_WIDTH : integer := 4;
    + constant C_OPB_CTL_REG_WIDTH : integer := 6;
    -- bits
    constant C_OPB_CTL_REG_DGE : integer := 0;
    constant C_OPB_CTL_REG_TX_EN : integer := 1;
    constant C_OPB_CTL_REG_RX_EN : integer := 2;
    constant C_OPB_CTL_REG_RST : integer := 3;
    -
    + constant C_OPB_CTL_REG_CRC_EN : integer := 4;
    + constant C_OPB_CTL_REG_CRC_CLR : integer := 5;

    -- Status Register
    constant SPI_SR_Bit_TX_Prog_Full : integer := 0;
    @@ -55,6 +58,8 @@
    constant SPI_SR_Bit_RX_Underflow : integer := 11;

    constant SPI_SR_Bit_SS_n : integer := 12;
    + constant SPI_SR_Bit_TX_DMA_Done : integer := 13;
    + constant SPI_SR_Bit_RX_DMA_Done : integer := 14;

    -- Interrupt Status Register
    constant SPI_ISR_Bit_TX_Prog_Empty : integer := 0;



     
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