LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
    •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity

    •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
    •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
    •  
    Navigation: All forums > Cvs-checkins > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: cvs at opencores.org<cvs@o...>
    Date: Fri Mar 14 16:52:46 CET 2008
    Subject: [cvs-checkins] MODIFIED: System09 ...
    Top
    Date: 00/08/03 14:16:52

    Modified: System09/rtl/VHDL cpu09.vhd pia_timer.vhd timer.vhd
    Log:
    Updated software - XSA-3S1000 now runs FLEX on an IDE drive or CF card.


    Revision Changes Path
    1.2 System09/rtl/VHDL/cpu09.vhd

    http://www.opencores.org/cvsweb.shtml/System09/rtl/VHDL/cpu09.vhd.diff?r1=1.1&r2=1.2

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: cpu09.vhd
    ===================================================================
    RCS file: /cvsroot/dilbert57/System09/rtl/VHDL/cpu09.vhd,v
    retrieving revision 1.1
    retrieving revision 1.2
    diff -u -b -r1.1 -r1.2
    --- cpu09.vhd 9 Dec 2007 16:06:03 -0000 1.1
    +++ cpu09.vhd 14 Mar 2008 15:52:46 -0000 1.2
    @@ -1,4 +1,4 @@
    --- $Id: cpu09.vhd,v 1.1 2007/12/09 16:06:03 dilbert57 Exp $
    +-- $Id: cpu09.vhd,v 1.2 2008/03/14 15:52:46 dilbert57 Exp $
    --===========================================================================----
    --
    -- S Y N T H E Z I A B L E CPU09 - 6809 compatible CPU Core
    @@ -144,6 +144,25 @@
    -- line 9672 changed "if Halt <= '1' then" to "if Halt = '1' then"
    -- Changed sensitivity lists.
    --
    +-- Version 1.16 - 5th February 2008 - John Kent
    +-- FIRQ interrupts should take priority over IRQ Interrupts.
    +-- This presumably means they should be tested for before IRQ
    +-- when they happen concurrently.
    +--
    +-- Version 1.17 - 18th February 2008 - John Kent
    +-- NMI in CWAI should mask IRQ and FIRQ interrupts
    +--
    +-- Version 1.18 - 21st February 2008 - John Kent
    +-- Removed default register settings in each case statement
    +-- and placed them at the beginning of the state sequencer.
    +-- Modified the SYNC instruction so that the interrupt vector(iv)
    +-- is not set unless an unmasked FIRQ or IRQ is received.
    +--
    +-- Version 1.19 - 25th February 2008 - John Kent
    +-- Enumerated separate states for FIRQ/FAST and NMIIRQ/ENTIRE
    +-- Enumerated separate states for MASKI and MASKIF states
    +-- Removed code on BSR/JSR in fetch cycle
    +--
    library ieee;
    use ieee.std_logic_1164.all;
    use ieee.std_logic_unsigned.all;
    @@ -228,16 +247,17 @@
    push_return_hi_state, push_return_lo_state,
    pull_return_hi_state, pull_return_lo_state,
    -- Interrupt cycles
    - int_decr_state,
    - int_entire_state,
    + int_nmiirq_state, int_firq_state,
    + int_entire_state, int_fast_state,
    int_pcl_state, int_pch_state,
    int_upl_state, int_uph_state,
    int_iyl_state, int_iyh_state,
    int_ixl_state, int_ixh_state,
    - int_cc_state,
    - int_acca_state, int_accb_state,
    int_dp_state,
    - int_cwai_state, int_mask_state,
    + int_accb_state, int_acca_state,
    + int_cc_state,
    + int_cwai_state,
    + int_maski_state, int_maskif_state,
    -- Return From Interrupt
    rti_cc_state, rti_entire_state,
    rti_acca_state, rti_accb_state,
    @@ -303,7 +323,7 @@
    type pc_type is (reset_pc, latch_pc, load_pc, pull_lo_pc, pull_hi_pc, incr_pc );
    type md_type is (reset_md, latch_md, load_md, fetch_first_md, fetch_next_md, shiftl_md );
    type ea_type is (reset_ea, latch_ea, load_ea, fetch_first_ea, fetch_next_ea );
    - type iv_type is (reset_iv, latch_iv, nmi_iv, irq_iv, firq_iv, swi_iv, swi2_iv, swi3_iv, resv_iv);
    + type iv_type is (latch_iv, reset_iv, nmi_iv, irq_iv, firq_iv, swi_iv, swi2_iv, swi3_iv, resv_iv);
    type nmi_type is (reset_nmi, set_nmi, latch_nmi );
    type left_type is (cc_left, acca_left, accb_left, dp_left,
    ix_left, iy_left, up_left, sp_left,
    @@ -977,34 +997,34 @@
    dout_mux : process( dout_ctrl, md, acca, accb, dp, xreg, yreg, sp, up, pc, cc )
    begin
    case dout_ctrl is
    - when md_hi_dout => -- alu output
    - data_out <= md(15 downto 8);
    - when md_lo_dout => -- alu output
    - data_out <= md(7 downto 0);
    + when cc_dout => -- condition code register
    + data_out <= cc;
    when acca_dout => -- accumulator a
    data_out <= acca;
    when accb_dout => -- accumulator b
    data_out <= accb;
    - when ix_lo_dout => -- index reg
    + when dp_dout => -- direct page register
    + data_out <= dp; + when ix_lo_dout => -- X index reg data_out <= xreg(7 downto 0); - when ix_hi_dout => -- index reg + when ix_hi_dout => -- X index reg data_out <= xreg(15 downto 8); - when iy_lo_dout => -- index reg + when iy_lo_dout => -- Y index reg data_out <= yreg(7 downto 0); - when iy_hi_dout => -- index reg + when iy_hi_dout => -- Y index reg data_out <= yreg(15 downto 8); - when sp_lo_dout => -- s stack pointer - data_out <= sp(7 downto 0); - when sp_hi_dout => -- s stack pointer - data_out <= sp(15 downto 8); - when up_lo_dout => -- u stack pointer + when up_lo_dout => -- U stack pointer data_out <= up(7 downto 0); - when up_hi_dout => -- u stack pointer + when up_hi_dout => -- U stack pointer data_out <= up(15 downto 8); - when cc_dout => -- condition code register - data_out <= cc; - when dp_dout => -- direct page register - data_out <= dp; + when sp_lo_dout => -- S stack pointer + data_out <= sp(7 downto 0); + when sp_hi_dout => -- S stack pointer + data_out <= sp(15 downto 8); + when md_lo_dout => -- alu output + data_out <= md(7 downto 0); + when md_hi_dout => -- alu output + data_out <= md(15 downto 8); when pc_lo_dout => -- low order pc data_out <= pc(7 downto 0); when pc_hi_dout => -- high order pc @@ -1440,33 +1460,52 @@ irq, firq, nmi_req, nmi_ack, halt ) variable cond_true : boolean; -- variable used to evaluate coditional branches begin + -- Registers preserved + cc_ctrl <= latch_cc; + acca_ctrl <= latch_acca; + accb_ctrl <= latch_accb; + dp_ctrl <= latch_dp; + ix_ctrl <= latch_ix; + iy_ctrl <= latch_iy; + up_ctrl <= latch_up; + sp_ctrl <= latch_sp; + pc_ctrl <= latch_pc; + md_ctrl <= latch_md; + ea_ctrl <= latch_ea; + iv_ctrl <= latch_iv; + op_ctrl <= latch_op; + pre_ctrl <= latch_pre; + nmi_ctrl <= latch_nmi; + -- ALU Idle + left_ctrl <= pc_left; + right_ctrl <= zero_right; + alu_ctrl <= alu_nop; + -- Bus idle + addr_ctrl <= idle_ad; + dout_ctrl <= cc_dout; + -- Next State Fetch + st_ctrl <= idle_st; + return_state <= fetch_state; + next_state <= fetch_state; + case state is when reset_state => -- released from reset -- reset the registers op_ctrl <= reset_op; pre_ctrl <= reset_pre; + cc_ctrl <= reset_cc; acca_ctrl <= reset_acca; accb_ctrl <= reset_accb; + dp_ctrl <= reset_dp; ix_ctrl <= reset_ix; iy_ctrl <= reset_iy; - sp_ctrl <= reset_sp; up_ctrl <= reset_up; + sp_ctrl <= reset_sp; pc_ctrl <= reset_pc; ea_ctrl <= reset_ea; md_ctrl <= reset_md; iv_ctrl <= reset_iv; nmi_ctrl <= reset_nmi; - -- idle the ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= reset_cc; - dp_ctrl <= reset_dp; - -- idle the bus - dout_ctrl <= md_lo_dout; - addr_ctrl <= idle_ad; - st_ctrl <= idle_st; - return_state <= vect_hi_state; next_state <= vect_hi_state; -- @@ -1475,31 +1514,9 @@ -- fetch PC hi from vector location -- when vect_hi_state => - -- default the registers - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - nmi_ctrl <= latch_nmi; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - md_ctrl <= latch_md; - ea_ctrl <= latch_ea; - iv_ctrl <= latch_iv; - -- idle the ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - dp_ctrl <= latch_dp; -- fetch pc low interrupt vector pc_ctrl <= pull_hi_pc; addr_ctrl <= int_hi_ad; - dout_ctrl <= pc_hi_dout; - st_ctrl <= idle_st; - return_state <= vect_lo_state; next_state <= vect_lo_state; -- -- jump via interrupt vector @@ -1507,31 +1524,9 @@ -- fetch PC lo from vector location -- when vect_lo_state => - -- default the registers - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - nmi_ctrl <= latch_nmi; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - md_ctrl <= latch_md; - ea_ctrl <= latch_ea; - iv_ctrl <= latch_iv; - -- idle the ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - dp_ctrl <= latch_dp; -- fetch the vector low byte pc_ctrl <= pull_lo_pc; addr_ctrl <= int_lo_ad; - dout_ctrl <= pc_lo_dout; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- -- Here to fetch an instruction @@ -1545,11 +1540,8 @@ op_ctrl <= fetch_op; pre_ctrl <= fetch_pre; ea_ctrl <= reset_ea; - md_ctrl <= latch_md; -- Fetch op code addr_ctrl <= fetch_ad; - dout_ctrl <= md_lo_dout; - dp_ctrl <= latch_dp; -- case op_code(7 downto 6) is when "10" => -- acca @@ -1560,33 +1552,17 @@ alu_ctrl <= alu_sub8; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0001" => -- cmpa left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_sub8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0010" => -- sbca left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_sbc; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0011" => case pre_code is when "00010000" => -- page 2 -- cmpd @@ -1594,23 +1570,11 @@ right_ctrl <= md_right; alu_ctrl <= alu_sub16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "00010001" => -- page 3 -- cmpu left_ctrl <= up_left; right_ctrl <= md_right; alu_ctrl <= alu_sub16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when others => -- page 1 -- subd left_ctrl <= accd_left; right_ctrl <= md_right; @@ -1618,10 +1582,6 @@ cc_ctrl <= load_cc; acca_ctrl <= load_hi_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; end case; when "0100" => -- anda left_ctrl <= acca_left; @@ -1629,88 +1589,46 @@ alu_ctrl <= alu_and; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0101" => -- bita left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_and; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0110" => -- ldaa left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_ld8; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0111" => -- staa left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_st8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1000" => -- eora left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_eor; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1001" => -- adca left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_adc; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1010" => -- oraa left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_ora; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1011" => -- adda left_ctrl <= acca_left; right_ctrl <= md_right; alu_ctrl <= alu_add8; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1100" => case pre_code is when "00010000" => -- page 2 -- cmpy @@ -1718,46 +1636,19 @@ right_ctrl <= md_right; alu_ctrl <= alu_sub16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "00010001" => -- page 3 -- cmps left_ctrl <= sp_left; right_ctrl <= md_right; alu_ctrl <= alu_sub16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when others => -- page 1 -- cmpx left_ctrl <= ix_left; right_ctrl <= md_right; alu_ctrl <= alu_sub16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; end case; when "1101" => -- bsr / jsr - left_ctrl <= pc_left; - right_ctrl <= md_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; + null; when "1110" => -- ldx case pre_code is when "00010000" => -- page 2 -- ldy @@ -1765,23 +1656,13 @@ right_ctrl <= md_right; alu_ctrl <= alu_ld16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; iy_ctrl <= load_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when others => -- page 1 -- ldx left_ctrl <= ix_left; right_ctrl <= md_right; alu_ctrl <= alu_ld16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; ix_ctrl <= load_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; end case; when "1111" => -- stx case pre_code is @@ -1790,36 +1671,14 @@ right_ctrl <= md_right; alu_ctrl <= alu_st16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when others => -- page 1 -- stx left_ctrl <= ix_left; right_ctrl <= md_right; alu_ctrl <= alu_st16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; end case; when others => null; --- left_ctrl <= acca_left; --- right_ctrl <= md_right; --- alu_ctrl <= alu_nop; --- cc_ctrl <= latch_cc; --- acca_ctrl <= latch_acca; --- accb_ctrl <= latch_accb; --- ix_ctrl <= latch_ix; --- iy_ctrl <= latch_iy; --- up_ctrl <= latch_up; --- sp_ctrl <= latch_sp; end case; when "11" => -- accb dual op case op_code(3 downto 0) is @@ -1828,34 +1687,18 @@ right_ctrl <= md_right; alu_ctrl <= alu_sub8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0001" => -- cmpb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_sub8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0010" => -- sbcb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_sbc; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0011" => -- addd left_ctrl <= accd_left; right_ctrl <= md_right; @@ -1863,98 +1706,52 @@ cc_ctrl <= load_cc; acca_ctrl <= load_hi_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0100" => -- andb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_and; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0101" => -- bitb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_and; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0110" => -- ldab left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_ld8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "0111" => -- stab left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_st8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1000" => -- eorb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_eor; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1001" => -- adcb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_adc; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1010" => -- orab left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_ora; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1011" => -- addb left_ctrl <= accb_left; right_ctrl <= md_right; alu_ctrl <= alu_add8; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1100" => -- ldd left_ctrl <= accd_left; right_ctrl <= md_right; @@ -1962,21 +1759,11 @@ cc_ctrl <= load_cc; acca_ctrl <= load_hi_acca; accb_ctrl <= load_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1101" => -- std left_ctrl <= accd_left; right_ctrl <= md_right; alu_ctrl <= alu_st16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when "1110" => -- ldu case pre_code is when "00010000" => -- page 2 -- lds @@ -1984,23 +1771,13 @@ right_ctrl <= md_right; alu_ctrl <= alu_ld16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; sp_ctrl <= load_sp; when others => -- page 1 -- ldu left_ctrl <= up_left; right_ctrl <= md_right; alu_ctrl <= alu_ld16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; up_ctrl <= load_up; - sp_ctrl <= latch_sp; end case; when "1111" => case pre_code is @@ -2009,64 +1786,26 @@ right_ctrl <= md_right; alu_ctrl <= alu_st16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; when others => -- page 1 -- stu left_ctrl <= up_left; right_ctrl <= md_right; alu_ctrl <= alu_st16; cc_ctrl <= load_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; end case; when others => null; --- left_ctrl <= accb_left; --- right_ctrl <= md_right; --- alu_ctrl <= alu_nop; --- cc_ctrl <= latch_cc; --- acca_ctrl <= latch_acca; --- accb_ctrl <= latch_accb; --- ix_ctrl <= latch_ix; --- iy_ctrl <= latch_iy; --- up_ctrl <= latch_up; --- sp_ctrl <= latch_sp; end case; when others => - left_ctrl <= acca_left; - right_ctrl <= md_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; + null; end case; if halt = '1' then iv_ctrl <= reset_iv; - pc_ctrl <= latch_pc; - nmi_ctrl <= latch_nmi; - st_ctrl <= push_st; - return_state <= fetch_state; next_state <= halt_state; -- service non maskable interrupts elsif (nmi_req = '1') and (nmi_ack = '0') then iv_ctrl <= nmi_iv; - pc_ctrl <= latch_pc; nmi_ctrl <= set_nmi; - st_ctrl <= idle_st; - return_state <= fetch_state; - next_state <= int_decr_state; + next_state <= int_nmiirq_state; -- service maskable interrupts else -- @@ -2074,30 +1813,20 @@ -- if(nmi_req = '0') and (nmi_ack='1') then nmi_ctrl <= reset_nmi; - else - nmi_ctrl <= latch_nmi; end if; -- - -- IRQ is level sensitive + -- FIRQ & IRQ are level sensitive -- - if (irq = '1') and (cc(IBIT) = '0') then - iv_ctrl <= irq_iv; - pc_ctrl <= latch_pc; - st_ctrl <= idle_st; - return_state <= fetch_state; - next_state <= int_decr_state; - elsif (firq = '1') and (cc(FBIT) = '0') then + if (firq = '1') and (cc(FBIT) = '0') then iv_ctrl <= firq_iv; - pc_ctrl <= latch_pc; - st_ctrl <= idle_st; - return_state <= fetch_state; - next_state <= int_decr_state; + next_state <= int_firq_state; + elsif (irq = '1') and (cc(IBIT) = '0') then + iv_ctrl <= irq_iv; + next_state <= int_nmiirq_state; else -- Advance the PC to fetch next instruction byte iv_ctrl <= reset_iv; -- default to reset pc_ctrl <= incr_pc; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= decode1_state; end if; end if; @@ -2107,14 +1836,10 @@ -- whether it be necessary or not -- when decode1_state => - pre_ctrl <= latch_pre; -- fetch first byte of address or immediate data ea_ctrl <= fetch_first_ea; md_ctrl <= fetch_first_md; addr_ctrl <= fetch_ad; - dout_ctrl <= md_lo_dout; - nmi_ctrl <= latch_nmi; - dp_ctrl <= latch_dp; case op_code(7 downto 4) is -- -- direct single op (2 bytes) @@ -2134,24 +1859,8 @@ -- 3 pc=ea -- when "0000" => - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- advance the PC pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; case op_code(3 downto 0) is when "1110" => -- jmp next_state <= jmp_state; @@ -2163,11 +1872,6 @@ -- acca / accb inherent instructions when "0001" => - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; case op_code(3 downto 0) is -- -- Page2 pre byte @@ -2176,18 +1880,8 @@ -- when "0000" => -- page2 op_ctrl <= fetch_op; - acca_ctrl <= latch_acca; - -- - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- advance pc pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= decode2_state; -- @@ -2197,18 +1891,8 @@ -- when "0001" => -- page3 op_ctrl <= fetch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- advance pc pc_ctrl <= incr_pc; - -- Next state - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= decode3_state; -- @@ -2219,19 +1903,6 @@ -- 2 decode -- when "0010" => -- nop - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- - pc_ctrl <= latch_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- @@ -2243,19 +1914,6 @@ -- CPU09 => Interrupts need only be asserted for one clock cycle -- when "0011" => -- sync - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- - pc_ctrl <= latch_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= sync_state; -- @@ -2268,19 +1926,8 @@ -- 4 pc=pc+md -- when "0110" => - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- increment the pc pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= lbranch_state; -- @@ -2295,110 +1942,52 @@ -- 6 pc=pc+md -- when "0111" => - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; -- pre decrement sp left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; -- increment the pc pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= lbranch_state; when "1001" => -- daa - op_ctrl <= latch_op; - -- left_ctrl <= acca_left; right_ctrl <= accb_right; alu_ctrl <= alu_daa; cc_ctrl <= load_cc; acca_ctrl <= load_acca; - sp_ctrl <= latch_sp; - -- idle pc - pc_ctrl <= latch_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; when "1010" => -- orcc - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- increment the pc pc_ctrl <= incr_pc; - -- next state st_ctrl <= push_st; return_state <= fetch_state; next_state <= orcc_state; when "1100" => -- andcc - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- increment the pc pc_ctrl <= incr_pc; - -- st_ctrl <= push_st; return_state <= fetch_state; next_state <= andcc_state; when "1101" => -- sex - op_ctrl <= latch_op; -- have sex left_ctrl <= accb_left; right_ctrl <= zero_right; alu_ctrl <= alu_sex; cc_ctrl <= load_cc; acca_ctrl <= load_hi_acca; - sp_ctrl <= latch_sp; - -- idle PC - pc_ctrl <= latch_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; when "1110" => -- exg - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- increment the pc pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= exg_state; when "1111" => -- tfr - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- increment the pc pc_ctrl <= incr_pc; -- call transfer as a subroutine @@ -2407,19 +1996,8 @@ next_state <= tfr_state; when others => - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; -- increment the pc pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; -- @@ -2431,33 +2009,14 @@ -- 3 if cc tru pc=pc+md else pc=pc -- when "0010" => -- branch conditional - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; - next_state <= sbranch_state; + next_state <= sbranch_state; -- -- Single byte stack operators -- Do not advance PC -- when "0011" => - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; -- -- lea - load effective address (2+ bytes) -- 6809 => 4 cycles + addressing mode @@ -2472,19 +2031,8 @@ "0001" | -- leay "0010" | -- leas "0011" => -- leau - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- advance PC pc_ctrl <= incr_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- st_ctrl <= push_st; return_state <= lea_state; next_state <= indexed_state; @@ -2517,22 +2065,8 @@ -- 15 if ea(0) = 1 (sp)=cc -- when "0100" => -- pshs - -- - left_ctrl <= sp_left; - right_ctrl <= one_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- advance PC pc_ctrl <= incr_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= pshs_state; -- @@ -2541,21 +2075,8 @@ -- cpu09 => 3 cycles + registers -- when "0101" => -- puls - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- advance PC pc_ctrl <= incr_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= puls_state; -- @@ -2564,22 +2085,8 @@ -- cpu09 => 3 cycles + registers -- when "0110" => -- pshu - -- idle UP - left_ctrl <= up_left; - right_ctrl <= one_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- advance PC pc_ctrl <= incr_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= pshu_state; -- @@ -2588,21 +2095,8 @@ -- cpu09 => 3 cycles + registers -- when "0111" => -- pulu - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- advance PC pc_ctrl <= incr_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= pulu_state; -- @@ -2615,19 +2109,6 @@ -- 4 pc_lo = (sp) / sp=sp+1 -- when "1001" => - left_ctrl <= sp_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- idle PC - pc_ctrl <= latch_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- st_ctrl <= push_st; return_state <= fetch_state; next_state <= pull_return_hi_state; @@ -2645,35 +2126,10 @@ left_ctrl <= ix_left; right_ctrl <= accb_right; alu_ctrl <= alu_abx; - cc_ctrl <= latch_cc; ix_ctrl <= load_ix; - -- - pc_ctrl <= latch_pc; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; when "1011" => -- rti - -- idle ALU - left_ctrl <= sp_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- - pc_ctrl <= latch_pc; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= rti_cc_state; when "1100" => -- cwai #$<cc_mask> @@ -2681,34 +2137,15 @@ left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; - -- + iv_ctrl <= reset_iv; + -- increment pc pc_ctrl <= incr_pc; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- st_ctrl <= push_st; return_state <= int_entire_state; -- set entire flag next_state <= andcc_state; when "1101" => -- mul - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- - pc_ctrl <= latch_pc; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= mul_state; when "1111" => -- swi @@ -2716,36 +2153,11 @@ left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; - -- - pc_ctrl <= latch_pc; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; iv_ctrl <= swi_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= int_entire_state; when others => - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- idle PC - pc_ctrl <= latch_pc; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; @@ -2761,14 +2173,6 @@ -- Re-run opcode fetch cycle after decode -- when "0100" => -- acca single op - op_ctrl <= latch_op; - accb_ctrl <= latch_accb; - pc_ctrl <= latch_pc; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; left_ctrl <= acca_left; case op_code(3 downto 0) is when "0000" => -- neg @@ -2842,8 +2246,6 @@ acca_ctrl <= latch_acca; cc_ctrl <= latch_cc; end case; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- -- Single Operand accb @@ -2856,14 +2258,6 @@ -- Re-run opcode fetch cycle after decode -- when "0101" => - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - pc_ctrl <= latch_pc; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; left_ctrl <= accb_left; case op_code(3 downto 0) is when "0000" => -- neg @@ -2937,8 +2331,6 @@ accb_ctrl <= latch_accb; cc_ctrl <= latch_cc; end case; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- -- Single operand indexed @@ -2946,22 +2338,9 @@ -- EA should hold index offset -- when "0110" => -- indexed single op - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; - -- next state + st_ctrl <= push_st; case op_code(3 downto 0) is when "1110" => -- jmp return_state <= jmp_state; @@ -2970,7 +2349,6 @@ when others => return_state <= single_op_read_state; end case; - st_ctrl <= push_st; next_state <= indexed_state; -- -- Single operand extended addressing @@ -2978,22 +2356,9 @@ -- Low order EA holds high order address -- when "0111" => -- extended single op - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- increment PC pc_ctrl <= incr_pc; - -- + st_ctrl <= push_st; case op_code(3 downto 0) is when "1110" => -- jmp return_state <= jmp_state; @@ -3002,30 +2367,15 @@ when others => return_state <= single_op_read_state; end case; - st_ctrl <= push_st; next_state <= extended_state; when "1000" => -- acca immediate - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is when "0011" | -- subd # "1100" | -- cmpx # "1110" => -- ldx # - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= fetch_state; next_state <= imm16_state; @@ -3045,7 +2395,6 @@ left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; -- st_ctrl <= push_st; @@ -3053,53 +2402,19 @@ next_state <= push_return_lo_state; when others => - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1001" => -- acca direct - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is when "0011" | -- subd "1100" | -- cmpx "1110" => -- ldx - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read16_state; when "0111" => -- sta direct - -- idle ALU - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write8_state; when "1111" => -- stx direct @@ -3109,9 +2424,6 @@ alu_ctrl <= alu_nop; cc_ctrl <= latch_cc; sp_ctrl <= latch_sp; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write16_state; -- @@ -3129,7 +2441,6 @@ left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; -- st_ctrl <= push_st; @@ -3137,180 +2448,76 @@ next_state <= push_return_lo_state; when others => - -- idle ALU - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read8_state; end case; when "1010" => -- acca indexed - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is when "0011" | -- subd "1100" | -- cmpx "1110" => -- ldx - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_read16_state; next_state <= indexed_state; when "0111" => -- staa ,x - -- idle ALU - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_write8_state; next_state <= indexed_state; when "1111" => -- stx ,x - -- idle ALU - left_ctrl <= ix_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_write16_state; next_state <= indexed_state; when "1101" => -- jsr ,x -- DO NOT pre decrement SP - left_ctrl <= sp_left; - right_ctrl <= one_right; - alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= jsr_state; next_state <= indexed_state; when others => - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_read8_state; next_state <= indexed_state; end case; when "1011" => -- acca extended - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is when "0011" | -- subd "1100" | -- cmpx "1110" => -- ldx - -- idle ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_read16_state; next_state <= extended_state; when "0111" => -- staa > - -- idle ALU - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_write8_state; next_state <= extended_state; when "1111" => -- stx > - -- idle ALU - left_ctrl <= ix_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_write16_state; next_state <= extended_state; when "1101" => -- jsr >extended -- DO NOT pre decrement sp - left_ctrl <= sp_left; - right_ctrl <= one_right; - alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= jsr_state; next_state <= extended_state; when others => - -- idle ALU - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_st8; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - -- st_ctrl <= push_st; return_state <= dual_op_read8_state; next_state <= extended_state; end case; when "1100" => -- accb immediate - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3322,76 +2529,36 @@ next_state <= imm16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1101" => -- accb direct - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; - -- - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- case op_code(3 downto 0) is when "0011" | -- addd "1100" | -- ldd "1110" => -- ldu - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read16_state; when "0111" => -- stab direct - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write8_state; when "1101" => -- std direct - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write16_state; when "1111" => -- stu direct - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read8_state; end case; when "1110" => -- accb indexed - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; - -- - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- case op_code(3 downto 0) is when "0011" | -- addd "1100" | -- ldd @@ -3422,22 +2589,8 @@ end case; when "1111" => -- accb extended - op_ctrl <= latch_op; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; -- increment the pc pc_ctrl <= incr_pc; - -- - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- case op_code(3 downto 0) is when "0011" | -- addd "1100" | -- ldd @@ -3469,25 +2622,6 @@ when others => null; --- op_ctrl <= latch_op; --- acca_ctrl <= latch_acca; --- accb_ctrl <= latch_accb; --- ix_ctrl <= latch_ix; --- iy_ctrl <= latch_iy; --- up_ctrl <= latch_up; --- sp_ctrl <= latch_sp; --- iv_ctrl <= latch_iv; --- -- idle the ALU --- left_ctrl <= pc_left; --- right_ctrl <= zero_right; --- alu_ctrl <= alu_nop; --- cc_ctrl <= latch_cc; --- -- idle the pc --- pc_ctrl <= latch_pc; --- -- --- st_ctrl <= idle_st; --- return_state <= fetch_state; --- next_state <= fetch_state; end case; -- @@ -3496,15 +2630,10 @@ -- whether it be necessary or not -- when decode2_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; -- fetch first byte of address or immediate data ea_ctrl <= fetch_first_ea; md_ctrl <= fetch_first_md; addr_ctrl <= fetch_ad; - dout_ctrl <= md_lo_dout; - nmi_ctrl <= latch_nmi; - dp_ctrl <= latch_dp; case op_code(7 downto 4) is -- -- lbcc -- long branch conditional @@ -3517,22 +2646,8 @@ -- 5 if cond pc=pc+md else pc=pc -- when "0010" => - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - sp_ctrl <= latch_sp; - up_ctrl <= latch_up; - iv_ctrl <= latch_iv; -- increment the pc - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; pc_ctrl <= incr_pc; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= lbranch_state; -- @@ -3540,52 +2655,21 @@ -- Do not advance PC -- when "0011" => - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - pc_ctrl <= latch_pc; case op_code(3 downto 0) is when "1111" => -- swi 2 -- predecrement sp left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; iv_ctrl <= swi2_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= int_entire_state; when others => - left_ctrl <= sp_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1000" => -- acca immediate - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- Idle the ALU - left_ctrl <= pc_left; - right_ctrl <= one_right; - alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3597,60 +2681,28 @@ next_state <= imm16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1001" => -- acca direct - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is when "0011" | -- cmpd < "1100" | -- cmpy < "1110" => -- ldy < - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read16_state; when "1111" => -- sty < - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1010" => -- acca indexed - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3667,24 +2719,10 @@ next_state <= indexed_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1011" => -- acca extended - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the ALU - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3701,25 +2739,11 @@ next_state <= extended_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1100" => -- accb immediate - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3731,60 +2755,28 @@ next_state <= imm16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1101" => -- accb direct - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is when "0011" | -- undef < "1100" | -- undef < "1110" => -- lds < - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read16_state; when "1111" => -- sts < - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1110" => -- accb indexed - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3801,25 +2793,11 @@ next_state <= indexed_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1111" => -- accb extended - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3836,29 +2814,10 @@ next_state <= extended_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; - end case; when others => - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- idle the pc - pc_ctrl <= latch_pc; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; -- @@ -3867,66 +2826,30 @@ -- whether it be necessary or not -- when decode3_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; ea_ctrl <= fetch_first_ea; md_ctrl <= fetch_first_md; addr_ctrl <= fetch_ad; dout_ctrl <= md_lo_dout; - nmi_ctrl <= latch_nmi; - dp_ctrl <= latch_dp; case op_code(7 downto 4) is -- -- Single byte stack operators -- Do not advance PC -- when "0011" => - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - pc_ctrl <= latch_pc; - -- case op_code(3 downto 0) is when "1111" => -- swi3 -- predecrement sp left_ctrl <= sp_left; right_ctrl <= one_right; alu_ctrl <= alu_sub16; - cc_ctrl <= latch_cc; sp_ctrl <= load_sp; iv_ctrl <= swi3_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= int_entire_state; when others => - left_ctrl <= sp_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1000" => -- acca immediate - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3937,24 +2860,10 @@ return_state <= fetch_state; next_state <= imm16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1001" => -- acca direct - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3966,25 +2875,11 @@ next_state <= dual_op_read16_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1010" => -- acca indexed - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -3996,25 +2891,11 @@ next_state <= indexed_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when "1011" => -- acca extended - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- increment the pc pc_ctrl <= incr_pc; case op_code(3 downto 0) is @@ -4025,28 +2906,10 @@ return_state <= dual_op_read16_state; next_state <= extended_state; when others => - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; when others => - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - iv_ctrl <= latch_iv; - -- idle the alu - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - -- idle the pc - pc_ctrl <= latch_pc; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; end case; @@ -4058,51 +2921,13 @@ -- read memory location -- when single_op_read_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - iv_ctrl <= latch_iv; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; - -- idle ALU - left_ctrl <= ea_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - ea_ctrl <= latch_ea; -- read memory into md md_ctrl <= fetch_first_md; addr_ctrl <= read_ad; dout_ctrl <= md_lo_dout; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= single_op_exec_state; when single_op_exec_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; - iv_ctrl <= latch_iv; - ea_ctrl <= latch_ea; - -- idle the bus - addr_ctrl <= idle_ad; - dout_ctrl <= md_lo_dout; - st_ctrl <= idle_st; - return_state <= fetch_state; case op_code(3 downto 0) is when "0000" => -- neg left_ctrl <= md_left; @@ -4110,7 +2935,6 @@ alu_ctrl <= alu_neg; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "0011" => -- com left_ctrl <= md_left; @@ -4118,7 +2942,6 @@ alu_ctrl <= alu_com; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "0100" => -- lsr left_ctrl <= md_left; @@ -4126,7 +2949,6 @@ alu_ctrl <= alu_lsr8; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "0110" => -- ror left_ctrl <= md_left; @@ -4134,7 +2956,6 @@ alu_ctrl <= alu_ror8; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "0111" => -- asr left_ctrl <= md_left; @@ -4142,7 +2963,6 @@ alu_ctrl <= alu_asr8; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "1000" => -- asl left_ctrl <= md_left; @@ -4150,7 +2970,6 @@ alu_ctrl <= alu_asl8; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "1001" => -- rol left_ctrl <= md_left; @@ -4158,7 +2977,6 @@ alu_ctrl <= alu_rol8; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "1010" => -- dec left_ctrl <= md_left; @@ -4166,15 +2984,8 @@ alu_ctrl <= alu_dec; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "1011" => -- undefined - left_ctrl <= md_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - md_ctrl <= latch_md; - pc_ctrl <= latch_pc; next_state <= fetch_state; when "1100" => -- inc left_ctrl <= md_left; @@ -4182,22 +2993,17 @@ alu_ctrl <= alu_inc; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when "1101" => -- tst left_ctrl <= md_left; right_ctrl <= zero_right; alu_ctrl <= alu_st8; cc_ctrl <= load_cc; - md_ctrl <= latch_md; - pc_ctrl <= latch_pc; next_state <= fetch_state; when "1110" => -- jmp left_ctrl <= md_left; right_ctrl <= zero_right; alu_ctrl <= alu_ld16; - cc_ctrl <= latch_cc; - md_ctrl <= latch_md; pc_ctrl <= load_pc; next_state <= fetch_state; when "1111" => -- clr @@ -4206,15 +3012,8 @@ alu_ctrl <= alu_clr; cc_ctrl <= load_cc; md_ctrl <= load_md; - pc_ctrl <= latch_pc; next_state <= single_op_write_state; when others => - left_ctrl <= md_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - md_ctrl <= latch_md; - pc_ctrl <= latch_pc; next_state <= fetch_state; end case; -- @@ -4224,31 +3023,9 @@ -- MD holds data -- when single_op_write_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - md_ctrl <= latch_md; - iv_ctrl <= latch_iv; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; - ea_ctrl <= latch_ea; - -- idle the ALU - left_ctrl <= acca_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; -- write ALU low byte output addr_ctrl <= write_ad; dout_ctrl <= md_lo_dout; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- @@ -4256,31 +3033,9 @@ -- read memory location -- when dual_op_read8_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - iv_ctrl <= latch_iv; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; - left_ctrl <= ea_left; - -- Leave the ea alone - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - ea_ctrl <= latch_ea; -- read first data byte from ea md_ctrl <= fetch_first_md; addr_ctrl <= read_ad; - dout_ctrl <= md_lo_dout; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- @@ -4290,31 +3045,14 @@ -- and the EA is incremented -- when dual_op_read16_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - cc_ctrl <= latch_cc; - dp_ctrl <= latch_dp; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - iv_ctrl <= latch_iv; - nmi_ctrl <= latch_nmi; -- increment the effective address left_ctrl <= ea_left; right_ctrl <= one_right; alu_ctrl <= alu_add16; ea_ctrl <= load_ea; - -- read the low byte of the 16 bit data + -- read the high byte of the 16 bit data md_ctrl <= fetch_first_md; addr_ctrl <= read_ad; - dout_ctrl <= md_lo_dout; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_read16_2_state; -- @@ -4322,31 +3060,9 @@ -- pointed to by EA into MD -- when dual_op_read16_2_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - cc_ctrl <= latch_cc; - dp_ctrl <= latch_dp; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - iv_ctrl <= latch_iv; - nmi_ctrl <= latch_nmi; - -- idle the effective address - left_ctrl <= ea_left; - right_ctrl <= one_right; - alu_ctrl <= alu_nop; - ea_ctrl <= latch_ea; -- read the low byte of the 16 bit data md_ctrl <= fetch_next_md; addr_ctrl <= read_ad; - dout_ctrl <= md_lo_dout; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- @@ -4357,24 +3073,10 @@ -- register to write -- when dual_op_write16_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - md_ctrl <= latch_md; - iv_ctrl <= latch_iv; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; -- increment the effective address left_ctrl <= ea_left; right_ctrl <= one_right; alu_ctrl <= alu_add16; - cc_ctrl <= latch_cc; ea_ctrl <= load_ea; -- write the ALU hi byte at ea addr_ctrl <= write_ad; @@ -4405,8 +3107,6 @@ dout_ctrl <= md_hi_dout; end case; end if; - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= dual_op_write8_state; -- @@ -4419,27 +3119,7 @@ -- Also set the condition codes here -- when dual_op_write8_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - pc_ctrl <= latch_pc; - iv_ctrl <= latch_iv; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; - md_ctrl <= latch_md; - -- idle ALU - left_ctrl <= ea_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; - cc_ctrl <= latch_cc; - ea_ctrl <= latch_ea; - -- - if op_code(6) = '0' then -- '0' = acca line + if op_code(6) = '0' then case op_code(3 downto 0) is when "0111" => -- sta dout_ctrl <= acca_dout; @@ -4453,7 +3133,7 @@ when others => dout_ctrl <= md_lo_dout; end case; - else -- '1' = accb line + else case op_code(3 downto 0) is when "0111" => -- stb dout_ctrl <= accb_dout; @@ -4472,42 +3152,18 @@ end if; -- write ALU low byte output addr_ctrl <= write_ad; - -- - st_ctrl <= idle_st; - return_state <= fetch_state; next_state <= fetch_state; -- -- 16 bit immediate addressing mode -- when imm16_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - cc_ctrl <= latch_cc; - dp_ctrl <= latch_dp; - -- - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; - -- - iv_ctrl <= latch_iv; - nmi_ctrl <= latch_nmi; - ea_ctrl <= latch_ea; -- increment pc - left_ctrl <= pc_left; - right_ctrl <= zero_right; - alu_ctrl <= alu_nop; pc_ctrl <= incr_pc; -- fetch next immediate byte md_ctrl <= fetch_next_md; addr_ctrl <= fetch_ad; - dout_ctrl <= md_lo_dout; - -- return to caller st_ctrl <= pull_st; - return_state <= fetch_state; next_state <= saved_state; -- @@ -4516,22 +3172,10 @@ -- using the alu -- when indexed_state => - op_ctrl <= latch_op; - pre_ctrl <= latch_pre; - acca_ctrl <= latch_acca; - accb_ctrl <= latch_accb; - iv_ctrl <= latch_iv; - dp_ctrl <= latch_dp; - nmi_ctrl <= latch_nmi; - dout_ctrl <= md_lo_dout; -- -- decode indexing mode -- if md(7) = '0' then - ix_ctrl <= latch_ix; - iy_ctrl <= latch_iy; - up_ctrl <= latch_up; - sp_ctrl <= latch_sp; case md(6 downto 5) is when "00" => left_ctrl <= ix_left; @@ -4545,24 +3189,13 @@ end case; right_ctrl <= md_sign5_right; alu_c