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From: cvs at opencores.org<cvs@o...>
Date: Tue Feb 26 11:56:55 CET 2008
Subject: [cvs-checkins] MODIFIED: usb_dongle_fpga ...
Date: 00/08/02 26:11:56

Modified: usb_dongle_fpga/src/lpc_proto lpc_byte.vhd
Log:
Fix'ed TAR cycle second part this is not critical update


Revision Changes Path
1.5 usb_dongle_fpga/src/lpc_proto/lpc_byte.vhd

http://www.opencores.org/cvsweb.shtml/usb_dongle_fpga/src/lpc_proto/lpc_byte.vhd.diff?r1=1.4&r2=1.5

(In the diff below, changes in quantity of whitespace are not shown.)

Index: lpc_byte.vhd
===================================================================
RCS file: /cvsroot/nuubik/usb_dongle_fpga/src/lpc_proto/lpc_byte.vhd,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- lpc_byte.vhd 26 Feb 2008 09:04:23 -0000 1.4
+++ lpc_byte.vhd 26 Feb 2008 10:56:54 -0000 1.5
@@ -252,7 +252,7 @@
lad_rising_oe<='1';
elsif lad_i = TAR_OK then
r_cnt<=r_cnt + 1;
- lad_rising_oe<='1';
+ --lad_rising_oe<='1'; --BUG fix by LPC stanard TAR cycle part 2 must be tri-stated by host and device
lad_rising_o <= TAR_OK; --drive to F on the bus
CS <= TARs;
else