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Message
From: cvs at opencores.org<cvs@o...>
Date: Mon Feb 25 10:17:48 CET 2008
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/08/02 25:10:17 Modified: jop/quartus/cycvga jop.qsf
Log:
no message
Revision Changes Path
1.5 jop/quartus/cycvga/jop.qsf
http://www.opencores.org/cvsweb.shtml/jop/quartus/cycvga/jop.qsf.diff?r1=1.4&r2=1.5
(In the diff below, changes in quantity of whitespace are not shown.)
Index: jop.qsf
===================================================================
RCS file: /cvsroot/9914pich/jop/quartus/cycvga/jop.qsf,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- jop.qsf 5 Sep 2007 17:28:18 -0000 1.4
+++ jop.qsf 25 Feb 2008 09:17:48 -0000 1.5
@@ -28,7 +28,7 @@
set_global_assignment -name SMART_RECOMPILE OFF
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "02:05:59 APRIL 04, 2004"
-set_global_assignment -name LAST_QUARTUS_VERSION 7.0
+set_global_assignment -name LAST_QUARTUS_VERSION 7.2
# Pin & Location Assignments
# ==========================
@@ -477,6 +477,10 @@
# ---------------
+
+set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
+set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
+set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_config_80.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/core/jop_types.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/simpcon/sc_pack.vhd
@@ -485,7 +489,7 @@
set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_uart.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_usb.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_sys.vhd
-set_global_assignment -name VHDL_FILE ../../vhdl/scio/scio_cmp.vhd
+set_global_assignment -name VHDL_FILE ../../vhdl/scio/scio_dspiomin.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/offtbl.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/jtbl.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/altera/arom.vhd
@@ -506,5 +510,5 @@
set_global_assignment -name VHDL_FILE ../../vhdl/vga/dpram.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/vga/vga.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/simpcon/sc_arbiter_pack.vhd
-set_global_assignment -name VHDL_FILE ../../vhdl/simpcon/sc_arbiter.vhd
+set_global_assignment -name VHDL_FILE ../../vhdl/simpcon/sc_arbiter_fixedpr.vhd
set_global_assignment -name VHDL_FILE ../../vhdl/top/jopvga.vhd
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