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Message
From: cvs at opencores.org<cvs@o...>
Date: Fri Nov 30 21:21:19 CET 2007
Subject: [cvs-checkins] MODIFIED: spi_slave ...
Date: 00/07/11 30:21:21 Added: spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if
opb_m_if_tb_c.do opb_m_if_tb_s.do opb_m_if_tb_w.do
Log:
Initial Release
Revision Changes Path
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_c.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_c.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: opb_m_if_tb_c.do
===================================================================
vlib work
# packages
vcom -93 ../../../../../rtl/vhdl/opb_spi_slave_pack.vhd
# DUT
vcom -93 ../../../../../rtl/vhdl/opb_m_if.vhd
# Testbench
vcom -93 ../../../../../bench/vhdl/opb_m_if_tb.vhd
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_s.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_s.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: opb_m_if_tb_s.do
===================================================================
vsim -t ps opb_m_if_tb
view wave
do opb_m_if_tb_w.do
run -all
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_w.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_w.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: opb_m_if_tb_w.do
===================================================================
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider Internal
add wave -noupdate -format Logic /opb_m_if_tb/opb_clk
add wave -noupdate -format Logic /opb_m_if_tb/opb_rst
add wave -noupdate -format Logic /opb_m_if_tb/m_request
add wave -noupdate -format Logic /opb_m_if_tb/mopb_mgrant
add wave -noupdate -format Logic /opb_m_if_tb/m_buslock
add wave -noupdate -format Logic /opb_m_if_tb/m_seqaddr
add wave -noupdate -format Logic /opb_m_if_tb/m_select
add wave -noupdate -format Logic /opb_m_if_tb/mopb_errack
add wave -noupdate -format Literal /opb_m_if_tb/m_be
add wave -noupdate -format Logic /opb_m_if_tb/m_rnw
add wave -noupdate -format Literal /opb_m_if_tb/m_abus
add wave -noupdate -format Literal /opb_m_if_tb/m_dbus
add wave -noupdate -format Literal /opb_m_if_tb/opb_dbus
add wave -noupdate -format Logic /opb_m_if_tb/mopb_retry
add wave -noupdate -format Logic /opb_m_if_tb/mopb_timeout
add wave -noupdate -format Logic /opb_m_if_tb/mopb_xferack
add wave -noupdate -divider T-FIFIO
add wave -noupdate -format Logic /opb_m_if_tb/opb_m_tx_req
add wave -noupdate -format Logic /opb_m_if_tb/opb_m_tx_en
add wave -noupdate -format Literal /opb_m_if_tb/opb_m_tx_data
add wave -noupdate -format Literal /opb_m_if_tb/opb_tx_dma_ctl
add wave -noupdate -format Literal /opb_m_if_tb/opb_tx_dma_addr
add wave -noupdate -divider R-FIFO
add wave -noupdate -format Logic /opb_m_if_tb/opb_m_rx_req
add wave -noupdate -format Logic /opb_m_if_tb/opb_m_rx_en
add wave -noupdate -format Literal /opb_m_if_tb/opb_m_rx_data
add wave -noupdate -format Literal /opb_m_if_tb/opb_rx_dma_ctl
add wave -noupdate -format Literal /opb_m_if_tb/opb_rx_dma_addr
add wave -noupdate -format Literal /opb_m_if_tb/opb_rx_data
add wave -noupdate -divider Internal
add wave -noupdate -format Logic /opb_m_if_tb/opb_m_if_2/read_transfer
add wave -noupdate -format Literal /opb_m_if_tb/opb_m_if_2/state
add wave -noupdate -format Literal -radix hexadecimal /opb_m_if_tb/opb_m_if_2/opb_tx_dma_addr_int
add wave -noupdate -format Literal /opb_m_if_tb/opb_m_if_2/opb_rx_dma_addr_int
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {1332415 ps} 0}
configure wave -namecolwidth 276
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
update
WaveRestoreZoom {0 ps} {1055780 ps}
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