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Message
From: cvs at opencores.org<cvs@o...>
Date: Fri Nov 30 21:21:16 CET 2007
Subject: [cvs-checkins] MODIFIED: spi_slave ...
Date: 00/07/11 30:21:21 Added: spi_slave/sim/rtl_sim/modelsim_sim/run/fifo fifo_tb_c.do
fifo_tb_s.do fifo_tb_w.do
Log:
Initial Release
Revision Changes Path
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_c.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_c.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: fifo_tb_c.do
===================================================================
vlib work
# packages
vcom -93 ../../../../../bench/vhdl/images-body.vhd
vcom -93 ../../../../../bench/vhdl/txt_util.vhd
# DUT
vcom -93 ../../../../../rtl/vhdl/gray_adder.vhd
vcom -93 ../../../../../rtl/vhdl/gray2bin.vhd
vcom -93 ../../../../../rtl/vhdl/bin2gray.vhd
vcom -93 ../../../../../rtl/vhdl/fifo_prog_flags.vhd
vcom -93 ../../../../../rtl/vhdl/ram.vhd
vcom -93 ../../../../../rtl/vhdl/fifo.vhd
# Testbench
vcom -93 ../../../../../bench/vhdl/fifo_tb.vhd
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_s.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_s.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: fifo_tb_s.do
===================================================================
vsim -t ps fifo_tb
view wave
do fifo_tb_w.do
run -all
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_w.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_w.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: fifo_tb_w.do
===================================================================
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -format Literal -radix hexadecimal /fifo_tb/prog_empty_thresh
add wave -noupdate -format Literal -radix hexadecimal /fifo_tb/prog_full_thresh
add wave -noupdate -divider {write port}
add wave -noupdate -format Logic /fifo_tb/wr_clk
add wave -noupdate -format Logic /fifo_tb/wr_en
add wave -noupdate -format Literal /fifo_tb/din
add wave -noupdate -divider read_port
add wave -noupdate -format Logic /fifo_tb/rd_clk
add wave -noupdate -format Logic /fifo_tb/rd_en
add wave -noupdate -format Literal /fifo_tb/dout
add wave -noupdate -divider flags
add wave -noupdate -format Logic /fifo_tb/prog_empty
add wave -noupdate -format Logic /fifo_tb/empty
add wave -noupdate -format Logic /fifo_tb/underflow
add wave -noupdate -format Logic /fifo_tb/prog_full
add wave -noupdate -format Logic /fifo_tb/full
add wave -noupdate -format Logic /fifo_tb/overflow
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {387500 ps} 0}
configure wave -namecolwidth 192
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
update
WaveRestoreZoom {0 ps} {1160250 ps}
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