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From: cvs at opencores.org<cvs@o...>
Date: Wed Aug 15 19:40:34 CEST 2007
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/07/08 15:19:40

Modified: jop/vhdl/scio sc_fpu.vhd
Log:
no message


Revision Changes Path
1.2 jop/vhdl/scio/sc_fpu.vhd

http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/sc_fpu.vhd.diff?r1=1.1&r2=1.2

(In the diff below, changes in quantity of whitespace are not shown.)

Index: sc_fpu.vhd
===================================================================
RCS file: /cvsroot/martin/jop/vhdl/scio/sc_fpu.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- sc_fpu.vhd 30 Jan 2006 13:15:50 -0000 1.1
+++ sc_fpu.vhd 15 Aug 2007 17:40:33 -0000 1.2
@@ -85,17 +85,17 @@
begin

if (reset_i='1') then
- start_i <= '0';
+-- start_i <= '0';
elsif rising_edge(clk_i) then

- if rd_i='1' then
- -- that's our very simple address decoder
- if address_i="0011" then
- start_i <= '1';
- end if;
- else
- start_i <= '0';
- end if;
+-- if rd_i='1' then
+-- -- that's our very simple address decoder
+-- if address_i="0011" then
+-- start_i <= '1';
+-- end if;
+-- else
+-- start_i <= '0';
+-- end if;
end if;

end process;
@@ -125,7 +125,9 @@
opa_i <= (others => '0');
opb_i <= (others => '0');
fpu_op_i <= (others => '0');
+ start_i <= '0';
elsif rising_edge(clk_i) then
+ start_i <= '0';

if wr_i='1' then
if address_i="0000" then
@@ -134,6 +136,7 @@
opb_i <= wr_data_i;
elsif address_i="0010" then
fpu_op_i <=wr_data_i(2 downto 0);
+ start_i <= '1';
end if;
end if;