OPENCORES.ORG

From: cvs at opencores.org<cvs@o...>
Date: Mon Jun 4 21:37:54 CEST 2007
Subject: [cvs-checkins] MODIFIED: jop ...

Date: 00/07/06 04:21:37

Modified: jop/vhdl/scio scio_dspio.vhd scio_dspiomin.vhd scio_lego.vhd scio_mikjen.vhd scio_min.vhd scio_min_fpu.vhd scio_rasmus.vhd Log: add cpu_id as generic Revision Changes Path 1.7 jop/vhdl/scio/scio_dspio.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_dspio.vhd.diff?r1=1.6&r2=1.7 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_dspio.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_dspio.vhd,v retrieving revision 1.6 retrieving revision 1.7 diff -u -b -r1.6 -r1.7 --- scio_dspio.vhd 1 Jun 2007 16:15:21 -0000 1.6 +++ scio_dspio.vhd 4 Jun 2007 19:37:53 -0000 1.7 @@ -39,6 +39,7 @@ use work.sc_pack.all; entity scio is +generic (cpu_id : integer := 0); port ( clk : in std_logic; reset : in std_logic; @@ -204,7 +205,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk, 1.4 jop/vhdl/scio/scio_dspiomin.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_dspiomin.vhd.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_dspiomin.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_dspiomin.vhd,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- scio_dspiomin.vhd 1 Jun 2007 15:35:23 -0000 1.3 +++ scio_dspiomin.vhd 4 Jun 2007 19:37:53 -0000 1.4 @@ -38,7 +38,7 @@ use work.jop_config.all; entity scio is - +generic (cpu_id : integer := 0); port ( clk : in std_logic; reset : in std_logic; @@ -145,7 +145,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk, 1.7 jop/vhdl/scio/scio_lego.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_lego.vhd.diff?r1=1.6&r2=1.7 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_lego.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_lego.vhd,v retrieving revision 1.6 retrieving revision 1.7 diff -u -b -r1.6 -r1.7 --- scio_lego.vhd 1 Jun 2007 17:13:27 -0000 1.6 +++ scio_lego.vhd 4 Jun 2007 19:37:53 -0000 1.7 @@ -38,6 +38,8 @@ entity scio is +generic (cpu_id : integer := 0); + port ( clk : in std_logic; reset : in std_logic; @@ -168,7 +170,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk, 1.3 jop/vhdl/scio/scio_mikjen.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_mikjen.vhd.diff?r1=1.2&r2=1.3 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_mikjen.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_mikjen.vhd,v retrieving revision 1.2 retrieving revision 1.3 diff -u -b -r1.2 -r1.3 --- scio_mikjen.vhd 1 Jun 2007 17:13:33 -0000 1.2 +++ scio_mikjen.vhd 4 Jun 2007 19:37:53 -0000 1.3 @@ -196,6 +196,7 @@ use work.sc_pack.all; entity scio is +generic (cpu_id : integer := 0); port ( clk : in std_logic; reset : in std_logic; @@ -310,7 +311,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk, 1.7 jop/vhdl/scio/scio_min.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_min.vhd.diff?r1=1.6&r2=1.7 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_min.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_min.vhd,v retrieving revision 1.6 retrieving revision 1.7 diff -u -b -r1.6 -r1.7 --- scio_min.vhd 1 Jun 2007 16:37:59 -0000 1.6 +++ scio_min.vhd 4 Jun 2007 19:37:53 -0000 1.7 @@ -37,7 +37,7 @@ use work.jop_config.all; entity scio is - +generic (cpu_id : integer := 0); port ( clk : in std_logic; reset : in std_logic; @@ -144,7 +144,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk, 1.4 jop/vhdl/scio/scio_min_fpu.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_min_fpu.vhd.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_min_fpu.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_min_fpu.vhd,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- scio_min_fpu.vhd 1 Jun 2007 16:49:39 -0000 1.3 +++ scio_min_fpu.vhd 4 Jun 2007 19:37:53 -0000 1.4 @@ -38,7 +38,7 @@ use work.jop_config.all; entity scio is - +generic (cpu_id : integer := 0); port ( clk : in std_logic; reset : in std_logic; @@ -145,7 +145,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk, 1.4 jop/vhdl/scio/scio_rasmus.vhd http://www.opencores.org/cvsweb.shtml/jop/vhdl/scio/scio_rasmus.vhd.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: scio_rasmus.vhd =================================================================== RCS file: /cvsroot/martin/jop/vhdl/scio/scio_rasmus.vhd,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- scio_rasmus.vhd 1 Jun 2007 17:23:45 -0000 1.3 +++ scio_rasmus.vhd 4 Jun 2007 19:37:53 -0000 1.4 @@ -195,6 +195,7 @@ use work.sc_pack.all; entity scio is +generic (cpu_id : integer := 0); port ( clk : in std_logic; reset : in std_logic; @@ -308,7 +309,7 @@ cmp_sys: entity work.sc_sys generic map ( addr_bits => SLAVE_ADDR_BITS, clk_freq => clk_freq, - cpu_id => 0 + cpu_id => cpu_id ) port map( clk => clk,