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From: cvs at opencores.org<cvs@o...>
Date: Thu May 31 21:42:52 CEST 2007
Subject: [cvs-checkins] MODIFIED: lq057q3dc02 ...
Date: 00/07/05 31:21:42

Modified: lq057q3dc02/hdl/vhsic/coe_image_gen clk_lcd_cyc_cntr.vhd
vsyncx_control.vhd
Log:



Revision Changes Path
1.6 lq057q3dc02/hdl/vhsic/coe_image_gen/clk_lcd_cyc_cntr.vhd

http://www.opencores.org/cvsweb.shtml/lq057q3dc02/hdl/vhsic/coe_image_gen/clk_lcd_cyc_cntr.vhd.diff?r1=1.5&r2=1.6

(In the diff below, changes in quantity of whitespace are not shown.)

Index: clk_lcd_cyc_cntr.vhd
===================================================================
RCS file: /cvsroot/jwdonal/lq057q3dc02/hdl/vhsic/coe_image_gen/clk_lcd_cyc_cntr.vhd,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -b -r1.5 -r1.6
--- clk_lcd_cyc_cntr.vhd 30 May 2007 05:25:55 -0000 1.5
+++ clk_lcd_cyc_cntr.vhd 31 May 2007 19:42:51 -0000 1.6
@@ -18,7 +18,7 @@
--
------------------------------------------------------------------------------
--
--- $Id: clk_lcd_cyc_cntr.vhd,v 1.5 2007/05/30 05:25:55 jwdonal Exp $
+-- $Id: clk_lcd_cyc_cntr.vhd,v 1.6 2007/05/31 19:42:51 jwdonal Exp $
--
-- Description:
-- Counts the number of CLK_LCD cycles that have occured after C_VSYNC_TVS
@@ -276,7 +276,7 @@
-- This is finite state machine process 3 of 3 for counting the
-- number of CLK_LCD cycles that have passed which controls
-- the pixel and ENAB count value (clk_cyc_num_reg). This process
- -- only controls the change of output values cased on the current
+ -- only controls the change of output values based on the current
-- state.
--
-- Inputs:



1.5 lq057q3dc02/hdl/vhsic/coe_image_gen/vsyncx_control.vhd

http://www.opencores.org/cvsweb.shtml/lq057q3dc02/hdl/vhsic/coe_image_gen/vsyncx_control.vhd.diff?r1=1.4&r2=1.5

(In the diff below, changes in quantity of whitespace are not shown.)

Index: vsyncx_control.vhd
===================================================================
RCS file: /cvsroot/jwdonal/lq057q3dc02/hdl/vhsic/coe_image_gen/vsyncx_control.vhd,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- vsyncx_control.vhd 29 May 2007 19:45:13 -0000 1.4
+++ vsyncx_control.vhd 31 May 2007 19:42:51 -0000 1.5
@@ -18,7 +18,7 @@
--
------------------------------------------------------------------------------
--
--- $Id: vsyncx_control.vhd,v 1.4 2007/05/29 19:45:13 jwdonal Exp $
+-- $Id: vsyncx_control.vhd,v 1.5 2007/05/31 19:42:51 jwdonal Exp $
--
-- Description:
-- This file controls VSYNCx. VSYNCx is dependent upon the number of HSYNCx
@@ -174,7 +174,7 @@
VSYNCx_Line_Cntr_1_PROC : process( RSTx, CLK_LCD )
begin

- if( RSTx = '0') then
+ if( RSTx = '0' ) then

Line_Cntr_cs <= READY;

@@ -270,7 +270,7 @@
-- Process Description:
-- This is finite state machine process 3 of 3 for the VSYNCx
-- signal controller. This process only controls the change of
- -- of output values cased on the current state.
+ -- of output values based on the current state.
--
-- Inputs:
-- Line_Cntr_cs