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From: cvs at opencores.org<cvs@o...>
Date: Thu Apr 12 22:21:34 CEST 2007
Subject: [cvs-checkins] MODIFIED: aemb ...
Date: 00/07/04 12:22:21

Modified: aemb/sim cversim
Log:
Moved testbench into /sim/verilog.

Simulation cleanups.


Revision Changes Path
1.2 aemb/sim/cversim

http://www.opencores.org/cvsweb.shtml/aemb/sim/cversim.diff?r1=1.1&r2=1.2

(In the diff below, changes in quantity of whitespace are not shown.)

Index: cversim
===================================================================
RCS file: /cvsroot/sybreon/aemb/sim/cversim,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- cversim 9 Mar 2007 17:41:55 -0000 1.1
+++ cversim 12 Apr 2007 20:21:33 -0000 1.2
@@ -1,7 +1,11 @@
#!/bin/sh
-# $Id: cversim,v 1.1 2007/03/09 17:41:55 sybreon Exp $
+# $Id: cversim,v 1.2 2007/04/12 20:21:33 sybreon Exp $
# $Log: cversim,v $
+# Revision 1.2 2007/04/12 20:21:33 sybreon
+# Moved testbench into /sim/verilog.
+# Simulation cleanups.
+#
# Revision 1.1 2007/03/09 17:41:55 sybreon
# initial import
#
-cver $@ ../rtl/verilog/*.v
+cver -q -w $@ ../rtl/verilog/*.v