LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cvs-checkins > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: cvs at opencores.org<cvs@o...>
    Date: Sun Mar 25 01:18:43 CET 2007
    Subject: [cvs-checkins] MODIFIED: jop ...
    Top
    Date: 00/07/03 25:01:18

    Modified: jop/modelsim sim.bat
    Log:
    AMBA tests


    Revision Changes Path
    1.9 jop/modelsim/sim.bat

    http://www.opencores.org/cvsweb.shtml/jop/modelsim/sim.bat.diff?r1=1.8&r2=1.9

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: sim.bat
    ===================================================================
    RCS file: /cvsroot/martin/jop/modelsim/sim.bat,v
    retrieving revision 1.8
    retrieving revision 1.9
    diff -u -b -r1.8 -r1.9
    --- sim.bat 18 Mar 2007 01:47:09 -0000 1.8
    +++ sim.bat 25 Mar 2007 00:18:43 -0000 1.9
    @@ -2,10 +2,24 @@
    rem set options=-93 -quiet -check_synthesis -lint -pedanticerrors
    set options=-93 -quiet
    rmdir /S/Q work
    +rmdir /S/Q grlib
    +rmdir /S/Q gaisler
    +rmdir /S/Q techmap
    vlib work
    +vlib grlib
    +vlib gaisler
    +vlib techmap
    +vcom -work grlib ../ext/gaisler/version.vhd
    +vcom -work grlib ../ext/gaisler/stdlib.vhd
    +vcom -work grlib ../ext/gaisler/amba.vhd
    +vcom -work gaisler ../ext/gaisler/devices.vhd
    +vcom -work techmap ../ext/gaisler/gencomp.vhd
    +vcom -work gaisler ../ext/gaisler/memctrl.vhd
    +vcom -work gaisler ../ext/gaisler/srctrl.vhd
    vcom %options% %jopdir%/simulation/sim_jop_config_100.vhd
    vcom %options% %jopdir%/core/jop_types.vhd
    vcom %options% %jopdir%/simpcon/sc_pack.vhd
    +vcom %options% %jopdir%/simpcon/sc2ahbsl.vhd
    vcom %options% %jopdir%/simulation/sim_ram.vhd
    vcom %options% %jopdir%/simulation/sim_pll.vhd
    vcom %options% %jopdir%/simulation/sim_jbc.vhd
    @@ -14,9 +28,6 @@
    rem vcom %options% %jopdir%/scio/fifo.vhd
    rem vcom %options% %jopdir%/scio/sc_uart.vhd
    vcom %options% %jopdir%/simulation/sim_sc_uart.vhd
    -vcom %options% %jopdir%/wishbone/wb_pack.vhd
    -rem vcom %options% %jopdir%/wishbone/wb_test_slave.vhd
    -rem vcom %options% %jopdir%/wishbone/wb_top.vhd
    vcom %options% %jopdir%/jtbl.vhd
    vcom %options% %jopdir%/offtbl.vhd
    vcom %options% %jopdir%/core/cache.vhd
    @@ -34,7 +45,8 @@
    vcom %options% %jopdir%/scio/sc_cnt.vhd
    vcom %options% %jopdir%/scio/scio_min.vhd
    vcom %options% %jopdir%/core/jopcpu.vhd
    -vcom %options% %jopdir%/top/jopcyc.vhd
    +rem vcom %options% %jopdir%/top/jopcyc.vhd
    +vcom %options% %jopdir%/top/jop_amba.vhd
    vcom %options% %jopdir%/simulation/tb_jop.vhd
    rem vcom %options% %jopdir%/top/jop_256x16.vhd
    rem vcom %options% %jopdir%/simulation/tb_jop_sram16.vhd



     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.