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Message
From: cvs at opencores.org<cvs@o...>
Date: Wed Feb 14 20:00:06 CET 2007
Subject: [cvs-checkins] MODIFIED: mlite ...
Date: 00/07/02 14:20:00 Modified: mlite/tools boot.asm
Log:
Implemented BREAK and SYSCALL opcodes
Revision Changes Path
1.11 mlite/tools/boot.asm
http://www.opencores.org/cvsweb.shtml/mlite/tools/boot.asm.diff?r1=1.10&r2=1.11
(In the diff below, changes in quantity of whitespace are not shown.)
Index: boot.asm
===================================================================
RCS file: /cvsroot/rhoads/mlite/tools/boot.asm,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -b -r1.10 -r1.11
--- boot.asm 5 Oct 2006 05:24:09 -0000 1.10
+++ boot.asm 14 Feb 2007 19:00:06 -0000 1.11
@@ -78,12 +78,12 @@
mflo $27
sw $27, 96($29) #lo
- addi $5, $29, 0
lui $6, 0x2000
lw $4, 0x20($6) #IRQ_STATUS
lw $6, 0x10($6) #IRQ_MASK
- jal OS_InterruptServiceRoutine
and $4, $4, $6
+ jal OS_InterruptServiceRoutine
+ addi $5, $29, 0
#Restore all temporary registers
lw $1, 16($29) #at
@@ -111,6 +111,7 @@
mtlo $27
addi $29, $29, 104 #adjust sp
+isr_return:
ori $27, $0, 0x1 #re-enable interrupts
jr $26
mtc0 $27, $12 #STATUS=1; enable interrupts
@@ -222,3 +223,17 @@
.set reorder
.end OS_AsmMult
+
+
+###################################################
+ .globl OS_Syscall
+ .ent OS_Syscall
+OS_Syscall:
+ .set noreorder
+ syscall 0
+ jr $31
+ nop
+ .set reorder
+ .end OS_Syscall
+
+
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