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Message
From: cvs at opencores.org<cvs@o...>
Date: Wed Jan 31 19:36:09 CET 2007
Subject: [cvs-checkins] MODIFIED: sdram_ctrl ...
Date: 00/07/01 31:19:36 Modified: sdram_ctrl/test_bench sdram_ctrl_tb.vhd
Log:
Multi chipselect version
Revision Changes Path
1.2 sdram_ctrl/test_bench/sdram_ctrl_tb.vhd
http://www.opencores.org/cvsweb.shtml/sdram_ctrl/test_bench/sdram_ctrl_tb.vhd.diff?r1=1.1&r2=1.2
(In the diff below, changes in quantity of whitespace are not shown.)
Index: sdram_ctrl_tb.vhd
===================================================================
RCS file: /cvsroot/ntpqa/sdram_ctrl/test_bench/sdram_ctrl_tb.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- sdram_ctrl_tb.vhd 17 Oct 2006 17:12:13 -0000 1.1
+++ sdram_ctrl_tb.vhd 31 Jan 2007 18:36:09 -0000 1.2
@@ -33,7 +33,7 @@
signal sdram_ba : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
signal sdram_cas_n : OUT STD_LOGIC;
signal sdram_cke : OUT STD_LOGIC;
- signal sdram_cs_n : OUT STD_LOGIC;
+ signal sdram_cs_n : OUT STD_LOGIC_VECTOR(0 downto 0);
signal sdram_dq : INOUT STD_LOGIC_VECTOR (31 DOWNTO 0);
signal sdram_dqm : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
signal sdram_ras_n : OUT STD_LOGIC;
@@ -75,7 +75,7 @@
signal SDRAM_CLK : std_logic;
signal SDRAM_CKE : std_logic;
- signal SDRAM_NCS : std_logic;
+ signal SDRAM_NCS : std_logic_vector(0 downto 0);
signal SDRAM_NRAS : std_logic;
signal SDRAM_NCAS : std_logic;
signal SDRAM_NWE : std_logic;
@@ -132,7 +132,7 @@
Ba => SDRAM_BANK,
Clk => SDRAM_CLK,
Cke => SDRAM_CKE,
- Cs_n => SDRAM_NCS,
+ Cs_n => SDRAM_NCS(0),
Ras_n => SDRAM_NRAS,
Cas_n => SDRAM_NCAS,
We_n => SDRAM_NWE,
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