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From: cvs at opencores.org<cvs@o...>
Date: Mon Jan 29 02:47:44 CET 2007
Subject: [cvs-checkins] MODIFIED: mlite ...
Date: 00/07/01 29:02:47

Modified: mlite/vhdl plasma.vhd plasma_if.vhd
Log:
Change memory_type to "XILINX_16X"


Revision Changes Path
1.6 mlite/vhdl/plasma.vhd

http://www.opencores.org/cvsweb.shtml/mlite/vhdl/plasma.vhd.diff?r1=1.5&r2=1.6

(In the diff below, changes in quantity of whitespace are not shown.)

Index: plasma.vhd
===================================================================
RCS file: /cvsroot/rhoads/mlite/vhdl/plasma.vhd,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -b -r1.5 -r1.6
--- plasma.vhd 13 Jan 2007 23:01:42 -0000 1.5
+++ plasma.vhd 29 Jan 2007 01:47:43 -0000 1.6
@@ -35,7 +35,7 @@
use work.mlite_pack.all;

entity plasma is
- generic(memory_type : string := "XILINX_X16"; --"DUAL_PORT_" "ALTERA_LPM";
+ generic(memory_type : string := "XILINX_16X"; --"DUAL_PORT_" "ALTERA_LPM";
log_file : string := "UNUSED");
port(clk : in std_logic;
reset : in std_logic;



1.3 mlite/vhdl/plasma_if.vhd

http://www.opencores.org/cvsweb.shtml/mlite/vhdl/plasma_if.vhd.diff?r1=1.2&r2=1.3

(In the diff below, changes in quantity of whitespace are not shown.)

Index: plasma_if.vhd
===================================================================
RCS file: /cvsroot/rhoads/mlite/vhdl/plasma_if.vhd,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- plasma_if.vhd 6 Mar 2006 02:07:03 -0000 1.2
+++ plasma_if.vhd 29 Jan 2007 01:47:43 -0000 1.3
@@ -40,7 +40,7 @@
architecture logic of plasma_if is

component plasma
- generic(memory_type : string := "XILINX_X16"; --"DUAL_PORT_" "ALTERA_LPM";
+ generic(memory_type : string := "XILINX_16X"; --"DUAL_PORT_" "ALTERA_LPM";
log_file : string := "UNUSED");
port(clk : in std_logic;
reset : in std_logic;