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From: cvs at opencores.org<cvs@o...>
Date: Fri Dec 29 18:54:21 CET 2006
Subject: [cvs-checkins] MODIFIED: ae18 ...
Date: 00/06/12 29:18:54

Modified: ae18/sw/asm ae18_core.asm
Log:
Added PCL read/write test




Revision Changes Path
1.3 ae18/sw/asm/ae18_core.asm

http://www.opencores.org/cvsweb.shtml/ae18/sw/asm/ae18_core.asm.diff?r1=1.2&r2=1.3

(In the diff below, changes in quantity of whitespace are not shown.)

Index: ae18_core.asm
===================================================================
RCS file: /cvsroot/sybreon/ae18/sw/asm/ae18_core.asm,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- ae18_core.asm 29 Dec 2006 08:17:17 -0000 1.2
+++ ae18_core.asm 29 Dec 2006 17:54:21 -0000 1.3
@@ -1,5 +1,5 @@
;;;
-;;; $Id: ae18_core.asm,v 1.2 2006/12/29 08:17:17 sybreon Exp $
+;;; $Id: ae18_core.asm,v 1.3 2006/12/29 17:54:21 sybreon Exp $
;;;
;;; Copyright (C) 2006 Shawn Tan Ser Ngiap <shawn.tan@a...>
;;;
@@ -77,6 +77,7 @@
rcall _FSR_TEST
rcall _SHA_TEST
rcall _TBL_TEST
+ rcall _PCL_TEST


;; All tests OK!!
@@ -93,6 +94,36 @@
bra $

;;
+ ;; PCL tests - OK
+ ;; Tests to check that PCLATU/PCLATH/PCL works.
+ ;;
+_PCL_TEST:
+ movlw UPPER(_PCL1)
+ movwf PCLATU
+ movlw HIGH(_PCL1)
+ movwf PCLATH
+ movlw LOW(_PCL1)
+ movwf PCL ; Jump
+ bra $
+_PCL1:
+ movlw 0xFF
+ movwf PCLATU
+ movwf PCLATH
+ movf PCL,W ; WREG = _PCL0
+_PCL0:
+ xorlw LOW(_PCL0)
+ bnz $
+ movf PCLATH,W
+ xorlw HIGH(_PCL0)
+ bnz $
+ movf PCLATU,W
+ xorlw UPPER(_PCL0)
+ bnz $
+
+ retlw 0x00
+
+
+ ;;
;; TABLE tests - OK
;; Tests to check that TBLRD is working
;;