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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Wed Nov 8 09:48:52 CET 2006
    Subject: [cvs-checkins] MODIFIED: hpc-16 ...
    Top
    Date: 00/06/11 08:09:48

    Modified: hpc-16/impl0/rtl/vhdl cpu.vhd
    Log:
    just change the binding of con1, for further testing of "rtlfast"


    Revision Changes Path
    1.3 hpc-16/impl0/rtl/vhdl/cpu.vhd

    http://www.opencores.org/cvsweb.shtml/hpc-16/impl0/rtl/vhdl/cpu.vhd.diff?r1=1.2&r2=1.3

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: cpu.vhd
    ===================================================================
    RCS file: /cvsroot/umairsiddiqui/hpc-16/impl0/rtl/vhdl/cpu.vhd,v
    retrieving revision 1.2
    retrieving revision 1.3
    diff -u -b -r1.2 -r1.3
    --- cpu.vhd 24 Oct 2006 09:59:09 -0000 1.2
    +++ cpu.vhd 8 Nov 2006 08:48:52 -0000 1.3
    @@ -78,7 +78,7 @@
    signal pcin_mux_sel, alua_mux_sel, marin_mux_sel : std_logic_vector(1 downto 0);


    - for control : con1 use entity work.con1(rtlfast);
    + for control : con1 use entity work.con1(rtl);

    begin




     
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