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From: cvs at opencores.org<cvs@o...>
Date: Thu Aug 17 13:30:55 CEST 2006
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/06/08 17:13:30

Added: jop/quartus/cyc256x16 jop.cdf jop.qpf jop.qsf
Log:
a plain 256x16 SRAM JOP version (also for Altera DE2)


Revision Changes Path
1.1 jop/quartus/cyc256x16/jop.cdf

http://www.opencores.org/cvsweb.shtml/jop/quartus/cyc256x16/jop.cdf?rev=1.1&content-type=text/x-cvsweb-markup

Index: jop.cdf
===================================================================
/* Quartus II Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Web Edition */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);

P ActionCode(Ign)
Device PartName(EPM3064A) MfrSpec(OpMask(0));
P ActionCode(Cfg)
Device PartName(EP1C6Q240) Path("") File("jop.sof") MfrSpec(OpMask(1));

ChainEnd;

AlteraBegin;
ChainType(JTAG);
AlteraEnd;



1.1 jop/quartus/cyc256x16/jop.qpf

http://www.opencores.org/cvsweb.shtml/jop/quartus/cyc256x16/jop.qpf?rev=1.1&content-type=text/x-cvsweb-markup

Index: jop.qpf
===================================================================
# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.



QUARTUS_VERSION = "6.0"
DATE = "20:32:02 August 07, 2006"


# Revisions

PROJECT_REVISION = "jop"



1.1 jop/quartus/cyc256x16/jop.qsf

http://www.opencores.org/cvsweb.shtml/jop/quartus/cyc256x16/jop.qsf?rev=1.1&content-type=text/x-cvsweb-markup

Index: jop.qsf
===================================================================
# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.


# The default values for assignments are stored in the file
# jop_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name TOP_LEVEL_ENTITY jop
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "6.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:32:02 AUGUST 07, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION "6.0 SP1"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_config_80.vhd set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_types.vhd set_global_assignment -name VHDL_FILE ../../vhdl/altera/cyc_pll.vhd set_global_assignment -name VHDL_FILE ../../vhdl/scio/fifo.vhd set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_uart.vhd set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_cnt.vhd set_global_assignment -name VHDL_FILE ../../vhdl/scio/scio_min.vhd set_global_assignment -name VHDL_FILE ../../vhdl/offtbl.vhd set_global_assignment -name VHDL_FILE ../../vhdl/jtbl.vhd set_global_assignment -name VHDL_FILE ../../vhdl/rom.vhd set_global_assignment -name VHDL_FILE ../../vhdl/altera/aram.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/bcfetch.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/core.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/decode.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/fetch.vhd set_global_assignment -name VHDL_FILE ../../vhdl/memory/sc_sram16.vhd set_global_assignment -name VHDL_FILE ../../vhdl/altera/cyc_jbc.vhd set_global_assignment -name VHDL_FILE ../../vhdl/memory/mem_sc.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/extension.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/cache.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/mul.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/shift.vhd set_global_assignment -name VHDL_FILE ../../vhdl/core/stack.vhd set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_256x16.vhd # Pin & Location Assignments # ========================== set_location_assignment PIN_152 -to clk set_location_assignment PIN_47 -to fl_a[0] set_location_assignment PIN_20 -to fl_a[10] set_location_assignment PIN_14 -to fl_a[11] set_location_assignment PIN_135 -to fl_a[12] set_location_assignment PIN_156 -to fl_a[13] set_location_assignment PIN_144 -to fl_a[14] set_location_assignment PIN_137 -to fl_a[15] set_location_assignment PIN_139 -to fl_a[16] set_location_assignment PIN_143 -to fl_a[17] set_location_assignment PIN_141 -to fl_a[18] set_location_assignment PIN_48 -to fl_a[1] set_location_assignment PIN_49 -to fl_a[2] set_location_assignment PIN_50 -to fl_a[3] set_location_assignment PIN_125 -to fl_a[4] set_location_assignment PIN_127 -to fl_a[5] set_location_assignment PIN_131 -to fl_a[6] set_location_assignment PIN_133 -to fl_a[7] set_location_assignment PIN_158 -to fl_a[8] set_location_assignment PIN_16 -to fl_a[9] set_location_assignment PIN_46 -to fl_d[0] set_location_assignment PIN_45 -to fl_d[1] set_location_assignment PIN_44 -to fl_d[2] set_location_assignment PIN_165 -to fl_d[3] set_location_assignment PIN_164 -to fl_d[4] set_location_assignment PIN_17 -to fl_d[5] set_location_assignment PIN_18 -to fl_d[6] set_location_assignment PIN_19 -to fl_d[7] set_location_assignment PIN_37 -to fl_ncs set_location_assignment PIN_23 -to fl_ncsb set_location_assignment PIN_24 -to fl_noe set_location_assignment PIN_15 -to fl_nwe set_location_assignment PIN_29 -to fl_rdy set_location_assignment PIN_21 -to freeio set_location_assignment PIN_124 -to io_b[10] set_location_assignment PIN_58 -to io_b[1] set_location_assignment PIN_59 -to io_b[2] set_location_assignment PIN_60 -to io_b[3] set_location_assignment PIN_61 -to io_b[4] set_location_assignment PIN_62 -to io_b[5] set_location_assignment PIN_120 -to io_b[6] set_location_assignment PIN_121 -to io_b[7] set_location_assignment PIN_122 -to io_b[8] set_location_assignment PIN_123 -to io_b[9] set_location_assignment PIN_13 -to io_l[10] set_location_assignment PIN_38 -to io_l[11] set_location_assignment PIN_39 -to io_l[12] set_location_assignment PIN_41 -to io_l[13] set_location_assignment PIN_42 -to io_l[14] set_location_assignment PIN_43 -to io_l[15] set_location_assignment PIN_53 -to io_l[16] set_location_assignment PIN_54 -to io_l[17] set_location_assignment PIN_55 -to io_l[18] set_location_assignment PIN_56 -to io_l[19] set_location_assignment PIN_2 -to io_l[1] set_location_assignment PIN_57 -to io_l[20] set_location_assignment PIN_3 -to io_l[2] set_location_assignment PIN_4 -to io_l[3] set_location_assignment PIN_5 -to io_l[4] set_location_assignment PIN_6 -to io_l[5] set_location_assignment PIN_7 -to io_l[6] set_location_assignment PIN_8 -to io_l[7] set_location_assignment PIN_11 -to io_l[8] set_location_assignment PIN_12 -to io_l[9] set_location_assignment PIN_162 -to io_r[10] set_location_assignment PIN_161 -to io_r[11] set_location_assignment PIN_160 -to io_r[12] set_location_assignment PIN_159 -to io_r[13] set_location_assignment PIN_140 -to io_r[14] set_location_assignment PIN_138 -to io_r[15] set_location_assignment PIN_136 -to io_r[16] set_location_assignment PIN_134 -to io_r[17] set_location_assignment PIN_132 -to io_r[18] set_location_assignment PIN_128 -to io_r[19] set_location_assignment PIN_176 -to io_r[1] set_location_assignment PIN_126 -to io_r[20] set_location_assignment PIN_175 -to io_r[2] set_location_assignment PIN_174 -to io_r[3] set_location_assignment PIN_173 -to io_r[4] set_location_assignment PIN_170 -to io_r[5] set_location_assignment PIN_169 -to io_r[6] set_location_assignment PIN_168 -to io_r[7] set_location_assignment PIN_167 -to io_r[8] set_location_assignment PIN_163 -to io_r[9] set_location_assignment PIN_1 -to io_t[1] set_location_assignment PIN_240 -to io_t[2] set_location_assignment PIN_239 -to io_t[3] set_location_assignment PIN_181 -to io_t[4] set_location_assignment PIN_180 -to io_t[5] set_location_assignment PIN_179 -to io_t[6] set_location_assignment PIN_64 -to rama_a[0] set_location_assignment PIN_63 -to rama_a[10] set_location_assignment PIN_116 -to rama_a[11] set_location_assignment PIN_114 -to rama_a[12] set_location_assignment PIN_108 -to rama_a[13] set_location_assignment PIN_106 -to rama_a[14] set_location_assignment PIN_67 -to rama_a[15] set_location_assignment PIN_119 -to rama_a[16] set_location_assignment PIN_118 -to rama_a[17] set_location_assignment PIN_66 -to rama_a[1] set_location_assignment PIN_68 -to rama_a[2] set_location_assignment PIN_74 -to rama_a[3] set_location_assignment PIN_76 -to rama_a[4] set_location_assignment PIN_107 -to rama_a[5] set_location_assignment PIN_113 -to rama_a[6] set_location_assignment PIN_115 -to rama_a[7] set_location_assignment PIN_117 -to rama_a[8] set_location_assignment PIN_65 -to rama_a[9] set_location_assignment PIN_82 -to rama_d[0] set_location_assignment PIN_95 -to rama_d[10] set_location_assignment PIN_93 -to rama_d[11] set_location_assignment PIN_87 -to rama_d[12] set_location_assignment PIN_85 -to rama_d[13] set_location_assignment PIN_83 -to rama_d[14] set_location_assignment PIN_79 -to rama_d[15] set_location_assignment PIN_84 -to rama_d[1] set_location_assignment PIN_86 -to rama_d[2] set_location_assignment PIN_88 -to rama_d[3] set_location_assignment PIN_94 -to rama_d[4] set_location_assignment PIN_98 -to rama_d[5] set_location_assignment PIN_100 -to rama_d[6] set_location_assignment PIN_104 -to rama_d[7] set_location_assignment PIN_101 -to rama_d[8] set_location_assignment PIN_99 -to rama_d[9] set_location_assignment PIN_78 -to rama_ncs set_location_assignment PIN_77 -to rama_nlb set_location_assignment PIN_73 -to rama_noe set_location_assignment PIN_75 -to rama_nub set_location_assignment PIN_105 -to rama_nwe set_location_assignment PIN_237 -to ramb_a[0] set_location_assignment PIN_238 -to ramb_a[10] set_location_assignment PIN_185 -to ramb_a[11] set_location_assignment PIN_187 -to ramb_a[12] set_location_assignment PIN_193 -to ramb_a[13] set_location_assignment PIN_195 -to ramb_a[14] set_location_assignment PIN_234 -to ramb_a[15] set_location_assignment PIN_182 -to ramb_a[16] set_location_assignment PIN_183 -to ramb_a[17] set_location_assignment PIN_235 -to ramb_a[1] set_location_assignment PIN_233 -to ramb_a[2] set_location_assignment PIN_227 -to ramb_a[3] set_location_assignment PIN_225 -to ramb_a[4] set_location_assignment PIN_194 -to ramb_a[5] set_location_assignment PIN_188 -to ramb_a[6] set_location_assignment PIN_186 -to ramb_a[7] set_location_assignment PIN_184 -to ramb_a[8] set_location_assignment PIN_236 -to ramb_a[9] set_location_assignment PIN_219 -to ramb_d[0] set_location_assignment PIN_206 -to ramb_d[10] set_location_assignment PIN_208 -to ramb_d[11] set_location_assignment PIN_214 -to ramb_d[12] set_location_assignment PIN_216 -to ramb_d[13] set_location_assignment PIN_218 -to ramb_d[14] set_location_assignment PIN_222 -to ramb_d[15] set_location_assignment PIN_217 -to ramb_d[1] set_location_assignment PIN_215 -to ramb_d[2] set_location_assignment PIN_213 -to ramb_d[3] set_location_assignment PIN_207 -to ramb_d[4] set_location_assignment PIN_203 -to ramb_d[5] set_location_assignment PIN_201 -to ramb_d[6] set_location_assignment PIN_197 -to ramb_d[7] set_location_assignment PIN_200 -to ramb_d[8] set_location_assignment PIN_202 -to ramb_d[9] set_location_assignment PIN_223 -to ramb_ncs set_location_assignment PIN_224 -to ramb_nlb set_location_assignment PIN_228 -to ramb_noe set_location_assignment PIN_226 -to ramb_nub set_location_assignment PIN_196 -to ramb_nwe set_location_assignment PIN_28 -to ser_ncts set_location_assignment PIN_177 -to ser_nrts set_location_assignment PIN_153 -to ser_rxd set_location_assignment PIN_178 -to ser_txd set_location_assignment PIN_166 -to wd set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED" set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVCMOS set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED" set_global_assignment -name DEVICE_MIGRATION_LIST "EP1C6Q240C8,EP1C12Q240C8" set_global_assignment -name IGNORE_CLOCK_SETTINGS ON set_global_assignment -name TSU_REQUIREMENT "2.5 ns" set_global_assignment -name TCO_REQUIREMENT "2.5 ns" set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED