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From: cvs at opencores.org<cvs@o...>
Date: Thu Aug 17 02:30:37 CEST 2006
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/06/08 17:02:30

Modified: jop/vhdl/memory sc_sram16.vhd
Log:
use cnt


Revision Changes Path
1.5 jop/vhdl/memory/sc_sram16.vhd

http://www.opencores.org/cvsweb.shtml/jop/vhdl/memory/sc_sram16.vhd.diff?r1=1.4&r2=1.5

(In the diff below, changes in quantity of whitespace are not shown.)

Index: sc_sram16.vhd
===================================================================
RCS file: /cvsroot/martin/jop/vhdl/memory/sc_sram16.vhd,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- sc_sram16.vhd 17 Aug 2006 00:16:34 -0000 1.4
+++ sc_sram16.vhd 17 Aug 2006 00:30:37 -0000 1.5
@@ -16,6 +16,8 @@
--
--
-- 2006-08-01 Adapted from sc_ram32.vhd
+-- 2006-08-16 Rebuilding the already working (lost) version
+-- Use wait_state, din register without MUX
--

Library IEEE;
@@ -339,14 +341,6 @@

if rd='1' or wr='1' then
wait_state <= to_unsigned(ram_ws+1, 4);
--- cnt <= "11";
- else
--- if state=rd1_l or state=rd2_l or state=wr_l then
--- -- if wait_state<4 then
--- if wait_state(3 downto 2)="00" then
--- cnt <= wait_state(1 downto 0)-1;
--- end if;
--- end if;
end if;

if state=rd2_h or state=wr_idl then
@@ -358,6 +352,12 @@
-- end if;
end if;

+ if state=rd1_l or state=rd2_l or state=wr_l then
+ -- if wait_state<4 then
+ if wait_state(3 downto 2)="00" then
+ cnt <= wait_state(1 downto 0)-1;
+ end if;
+ end if;

end if;
end process;