LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cvs-checkins > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: cvs at opencores.org<cvs@o...>
    Date: Sat Aug 12 02:44:59 CEST 2006
    Subject: [cvs-checkins] MODIFIED: jop ...
    Top
    Date: 00/06/08 12:02:44

    Modified: jop/quartus/altde2 jop.qsf
    Log:
    SDRAM added


    Revision Changes Path
    1.7 jop/quartus/altde2/jop.qsf

    http://www.opencores.org/cvsweb.shtml/jop/quartus/altde2/jop.qsf.diff?r1=1.6&r2=1.7

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: jop.qsf
    ===================================================================
    RCS file: /cvsroot/martin/jop/quartus/altde2/jop.qsf,v
    retrieving revision 1.6
    retrieving revision 1.7
    diff -u -b -r1.6 -r1.7
    --- jop.qsf 11 Aug 2006 19:31:56 -0000 1.6
    +++ jop.qsf 12 Aug 2006 00:44:59 -0000 1.7
    @@ -45,7 +45,6 @@

    set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_config_de2.vhd
    set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_types.vhd
    -set_global_assignment -name VHDL_FILE ../../vhdl/altera/cyc2_pll.vhd
    set_global_assignment -name VHDL_FILE ../../vhdl/scio/fifo.vhd
    set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_uart.vhd
    set_global_assignment -name VHDL_FILE ../../vhdl/scio/sc_cnt.vhd
    @@ -67,8 +66,14 @@
    set_global_assignment -name VHDL_FILE ../../vhdl/core/shift.vhd
    set_global_assignment -name VHDL_FILE ../../vhdl/core/stack.vhd
    set_global_assignment -name VHDL_FILE ../../vhdl/top/jop_avalon.vhd
    +set_global_assignment -name VHDL_FILE sdram.vhd
    +set_global_assignment -name VHDL_FILE sdram_0.vhd
    +set_global_assignment -name VHDL_FILE endian_0.vhd
    +set_global_assignment -name VHDL_FILE endian_1.vhd
    +set_global_assignment -name VHDL_FILE jop_avalon_0.vhd
    set_global_assignment -name VHDL_FILE jop_system.vhd
    set_global_assignment -name VHDL_FILE altera_europa_support.vhd
    +set_global_assignment -name VHDL_FILE ../../sopc/toplevel/de2_sdram_pll.vhd
    set_global_assignment -name VHDL_FILE ../../sopc/toplevel/de2_sopc_jop.vhd





     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.