|
Message
From: cvs at opencores.org<cvs@o...>
Date: Fri Aug 11 21:32:10 CEST 2006
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/06/08 11:21:32 Modified: jop/quartus/altde2 jop_system.ptf Log: 100 MHz with PLL Revision Changes Path 1.3 jop/quartus/altde2/jop_system.ptf http://www.opencores.org/cvsweb.shtml/jop/quartus/altde2/jop_system.ptf.diff?r1=1.2&r2=1.3 (In the diff below, changes in quantity of whitespace are not shown.) Index: jop_system.ptf =================================================================== RCS file: /cvsroot/martin/jop/quartus/altde2/jop_system.ptf,v retrieving revision 1.2 retrieving revision 1.3 diff -u -b -r1.2 -r1.3 --- jop_system.ptf 11 Aug 2006 18:28:20 -0000 1.2 +++ jop_system.ptf 11 Aug 2006 19:32:10 -0000 1.3 @@ -5,7 +5,7 @@ WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONE"; - clock_freq = "50000000"; + clock_freq = "100000000"; generate_hdl = "1"; generate_sdk = "1"; do_build_sim = "0"; @@ -15,7 +15,7 @@ { CLOCK clk { - frequency = "50000000"; + frequency = "100000000"; source = "External"; display_name = "clk"; Is_Clock_Source = "0";
|
 |