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Message
From: cvs at opencores.org<cvs@o...>
Date: Fri Aug 11 17:19:07 CEST 2006
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/06/08 11:17:19 Added: jop/asm/src serial.asm
Log:
test serial line at maximum speed
Revision Changes Path
1.1 jop/asm/src/serial.asm
http://www.opencores.org/cvsweb.shtml/jop/asm/src/serial.asm?rev=1.1&content-type=text/x-cvsweb-markup
Index: serial.asm
===================================================================
//
// serial.asm
//
// memory test, write memory content to serial line
//
//
// io address
//
io_cnt = -128
io_wd = -125
io_status = -112
io_uart = -111
ua_rdrf = 2
ua_tdre = 1
//
// local vars
//
a ?
b ?
c ?
//
// but starts with pc=0!!! (so init bc is not really necassary)
//
nop
nop
ldi 127
nop // written in adr/read stage!
stsp
ldi 0
stm a
//
// set WD bit
//
ldi io_wd
stmwa
ldi 1
stmwd
wait
wait
loop:
ser0:
ldi io_status
stmra
ldi ua_tdre
wait
wait
ldmrd
and
nop
bz ser0
nop
nop
ldi io_uart
stmwa
ldm a
stmwd
wait
wait
ldm a
ldi 1
add
stm a
ldi 1
nop
bnz loop
nop
nop
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