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From: cvs at opencores.org<cvs@o...>
Date: Sat Jun 24 02:50:46 CEST 2006
Subject: [cvs-checkins] MODIFIED: t48 ...
Date: 00/06/06 24:02:50

Modified: t48/sw/verif/include Makefile.core
Log:
adapt t48 external ROM offset




Revision Changes Path
1.4 t48/sw/verif/include/Makefile.core

http://www.opencores.org/cvsweb.shtml/t48/sw/verif/include/Makefile.core.diff?r1=1.3&r2=1.4

(In the diff below, changes in quantity of whitespace are not shown.)

Index: Makefile.core
===================================================================
RCS file: /cvsroot/arniml/t48/sw/verif/include/Makefile.core,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -b -r1.3 -r1.4
--- Makefile.core 21 Jun 2006 01:04:50 -0000 1.3
+++ Makefile.core 24 Jun 2006 00:50:46 -0000 1.4
@@ -22,8 +22,9 @@

$(SIM_DIR)/rom_t48.hex: $(MODULE).p
p2hex -r 0-1023 $< $@
+# lowest 1k of external ROM will not be used
$(SIM_DIR)/rom_t48_ext.hex: $(MODULE).p
- p2hex -a -r 1024-4095 $< $@
+ p2hex -r 1024-4095 $< $@

$(SIM_DIR)/rom_t49.hex: $(MODULE).p
p2hex -r 0-2047 $< $@