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From: cvs at opencores.org<cvs@o...>
Date: Tue Dec 20 12:32:11 CET 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/12 20:12:32

Added: or1k/rc203soc/sw/uClinux/include/asm-ppc a.out.h atomic.h
bitops.h bugs.h byteorder.h checksum.h delay.h
dma.h elf.h errno.h fcntl.h floppy.h io.h ioctl.h
ioctls.h irq.h mc146818rtc.h mman.h mmu.h
mmu_context.h nvram.h page.h param.h pgtable.h
posix_types.h ppc_machine.h processor.h ptrace.h
resource.h segment.h shmparam.h sigcontext.h
signal.h socket.h sockios.h stat.h statfs.h
string.h system.h termbits.h termios.h types.h
unaligned.h unistd.h unistd.h.cort
Log:
First Import of RC20x uClinux


Revision Changes Path
1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/a.out.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/a.out.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: a.out.h
===================================================================
#ifndef __PPC_A_OUT_H__
#define __PPC_A_OUT_H__

/* grabbed from the intel stuff */
#define STACK_TOP TASK_SIZE


struct exec
{
unsigned long a_info; /* Use macros N_MAGIC, etc for access */
unsigned a_text; /* length of text, in bytes */
unsigned a_data; /* length of data, in bytes */
unsigned a_bss; /* length of uninitialized data area for file, in bytes */
unsigned a_syms; /* length of symbol table data in file, in bytes */
unsigned a_entry; /* start address */
unsigned a_trsize; /* length of relocation info for text, in bytes */
unsigned a_drsize; /* length of relocation info for data, in bytes */
};


#define N_TRSIZE(a) ((a).a_trsize)
#define N_DRSIZE(a) ((a).a_drsize)
#define N_SYMSIZE(a) ((a).a_syms)


#endif



1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/atomic.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/atomic.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: atomic.h
===================================================================
/*
* PowerPC atomic operations
*/

#ifndef _ASM_PPC_ATOMIC_H_
#define _ASM_PPC_ATOMIC_H_

typedef int atomic_t;
#endif




1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/bitops.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/bitops.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: bitops.h
===================================================================
#ifndef _ASM_PPC_BITOPS_H_
#define _ASM_PPC_BITOPS_H_

/*
* For the benefit of those who are trying to port Linux to another
* architecture, here are some C-language equivalents. You should
* recode these in the native assembly language, if at all possible.
* To guarantee atomicity, these routines call cli() and sti() to
* disable interrupts while they operate. (You have to provide inline
* routines to cli() and sti().)
*
* Also note, these routines assume that you have 32 bit integers.
* You will have to change this if you are trying to port Linux to the
* Alpha architecture or to a Cray. :-)
*
* C language equivalents written by Theodore Ts'o, 9/26/92
*/

#include "asm/system.h" /* For cli/sti declaration */

#define BIT(n) 1<<(n&0x1F)
typedef unsigned long BITFIELD;

extern __inline__ int set_bit(int nr, void * add)
{
int mask, oldbit; BITFIELD *addr = add; int s = _disable_interrupts(); addr += nr >> 5; mask = BIT(nr); oldbit = (mask & *addr) != 0; *addr |= mask; _enable_interrupts(s); return oldbit; } extern __inline__ int change_bit(int nr, void *add) { BITFIELD *addr = add; int mask, retval; int s = _disable_interrupts(); addr += nr >> 5; mask = BIT(nr); retval = (mask & *addr) != 0; *addr ^= mask; _enable_interrupts(s); return retval; } extern __inline__ int clear_bit(int nr, void *add) { BITFIELD *addr = add; int mask, retval; int s = _disable_interrupts(); addr += nr >> 5; mask = BIT(nr); retval = (mask & *addr) != 0; *addr &= ~mask; _enable_interrupts(s); return retval; } extern __inline__ int test_bit(int nr, void *add) { int mask; BITFIELD *addr = add; addr += nr >> 5; mask = BIT(nr); return ((mask & *addr) != 0); } #if 0 extern __inline__ int find_first_zero_bit(void *add, int len) { int mask, nr, i; BITFIELD *addr = add; nr = 0; while (len) { if (~*addr != 0) { /* Contains at least one zero */ for (i = 0; i < 32; i++, nr++) { mask = BIT(nr); if ((mask & *addr) == 0) { return (nr); } } } len -= 32; addr++; nr += 32; } return (0); /* Shouldn't happen */ } extern __inline__ int find_next_zero_bit(void *add, int len, int nr) { int mask, i; BITFIELD *addr = add; addr += nr >> 5; len -= nr; while (len) { if (*addr != 0xFFFFFFFF) { /* Contains at least one zero */ for (i = 0; i < 32; i++, nr++) { mask = BIT(nr); if ((mask & *addr) == 0) { printk("Bit: %d(%d), Pat: %x\n", nr, nr&0x1F, *addr); return (nr); } } } len -= 32; addr++; nr += 32; } return (0); /* Shouldn't happen */ } #endif #endif /* _ASM_PPC_BITOPS_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/bugs.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/bugs.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bugs.h =================================================================== /* * This file is included by 'init/main.c' */ void check_bugs(void) { } 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/byteorder.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/byteorder.h?rev=1.1&content-type=text/x-cvsweb-markup Index: byteorder.h =================================================================== #ifndef _PPC_BYTEORDER_H #define _PPC_BYTEORDER_H #ifndef __BIG_ENDIAN #define __BIG_ENDIAN #endif #ifndef __BIG_ENDIAN_BITFIELD #define __BIG_ENDIAN_BITFIELD #endif #if 0 /* Assume PowerPC is Big-Endian! */ #undef ntohl #undef ntohs #undef htonl #undef htons extern unsigned long int ntohl(unsigned long int); extern unsigned short int ntohs(unsigned short int); extern unsigned long int htonl(unsigned long int); extern unsigned short int htons(unsigned short int); extern unsigned long int __ntohl(unsigned long int); extern unsigned short int __ntohs(unsigned short int); extern unsigned long int __constant_ntohl(unsigned long int); extern unsigned short int __constant_ntohs(unsigned short int); extern __inline__ unsigned long int __ntohl(unsigned long int x) { return (((x & 0x000000ffU) << 24) | ((x & 0x0000ff00U) << 8) | ((x & 0x00ff0000U) >> 8) | ((x & 0xff000000U) >> 24)); } extern __inline__ unsigned long int __constant_ntohl(unsigned long int x) { return (((x & 0x000000ffU) << 24) | ((x & 0x0000ff00U) << 8) | ((x & 0x00ff0000U) >> 8) | ((x & 0xff000000U) >> 24)); } extern __inline__ unsigned short int __ntohs(unsigned short int x) { return (((x & 0x00ff) << 8) | ((x & 0xff00) >> 8)); } extern __inline__ unsigned short int __constant_ntohs(unsigned short int x) { return (((x & 0x00ff) << 8) | ((x & 0xff00) >> 8)); } #define __htonl(x) __ntohl(x) #define __htons(x) __ntohs(x) #define __constant_htonl(x) __constant_ntohl(x) #define __constant_htons(x) __constant_ntohs(x) #ifdef __OPTIMIZE__ # define ntohl(x) \ (__builtin_constant_p((long)(x)) ? \ __constant_ntohl((x)) : \ __ntohl((x))) # define ntohs(x) \ (__builtin_constant_p((short)(x)) ? \ __constant_ntohs((x)) : \ __ntohs((x))) # define htonl(x) \ (__builtin_constant_p((long)(x)) ? \ __constant_htonl((x)) : \ __htonl((x))) # define htons(x) \ (__builtin_constant_p((short)(x)) ? \ __constant_htons((x)) : \ __htons((x))) #endif #else #define ntohl(x) (x) #define ntohs(x) (x) #define htonl(x) (x) #define htons(x) (x) #endif #endif /* !(_PPC_BYTEORDER_H) */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/checksum.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/checksum.h?rev=1.1&content-type=text/x-cvsweb-markup Index: checksum.h =================================================================== #ifndef _PPC_CHECKSUM_H #define _PPC_CHECKSUM_H /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl); /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ extern unsigned short int csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, unsigned short proto, unsigned int sum); /* * computes the checksum of a memory block at buff, length len, * and adds in "sum" (32-bit) * * returns a 32-bit number suitable for feeding into itself * or csum_tcpudp_magic * * this function must be called with even lengths, except * for the last fragment, which may be odd * * it's best to have buff aligned on a 32-bit boundary */ extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); /* * the same as csum_partial, but copies from src while it * checksums * * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ unsigned int csum_partial_copy( const char *src, char *dst, int len, int sum); /* * the same as csum_partial, but copies from user space (but on the alpha * we have just one address space, so this is identical to the above) */ #define csum_partial_copy_fromuser csum_partial_copy /* * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c A */ extern unsigned short ip_compute_csum(unsigned char * buff, int len); #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/delay.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/delay.h?rev=1.1&content-type=text/x-cvsweb-markup Index: delay.h =================================================================== #ifndef _PPC_DELAY_H #define _PPC_DELAY_H extern __inline__ void __delay(unsigned long ); extern __inline__ void __udelay(unsigned long ); extern __inline__ unsigned long muldiv(unsigned long a, unsigned long b, unsigned long c) { return (a*b)/c; } #endif /* defined(_PPC_DELAY_H) */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/dma.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/dma.h?rev=1.1&content-type=text/x-cvsweb-markup Index: dma.h =================================================================== /* $Id: dma.h,v 1.1 2005/12/20 11:32:05 jcastillo Exp $ * linux/include/asm/dma.h: Defines for using and allocating dma channels. * Written by Hennus Bergman, 1992. * High DMA channel support & info by Hannu Savolainen * and John Boyd, Nov. 1992. */ /* * Note: Adapted for PowerPC by Gary Thomas * * There may be some comments or restrictions made here which are * not valid for the PowerPC (PreP) platform. Take what you read * with a grain of salt. */ #ifndef _ASM_DMA_H #define _ASM_DMA_H #include <asm/io.h> /* need byte IO */ #ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER #define dma_outb outb_p #else #define dma_outb outb #endif #define dma_inb inb /* * NOTES about DMA transfers: * * controller 1: channels 0-3, byte operations, ports 00-1F * controller 2: channels 4-7, word operations, ports C0-DF * * - ALL registers are 8 bits only, regardless of transfer size * - channel 4 is not used - cascades 1 into 2. * - channels 0-3 are byte - addresses/counts are for physical bytes * - channels 5-7 are word - addresses/counts are for physical words * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries * - transfer count loaded to registers is 1 less than actual count * - controller 2 offsets are all even (2x offsets for controller 1) * - page registers for 5-7 don't use data bit 0, represent 128K pages * - page registers for 0-3 use bit 0, represent 64K pages * * DMA transfers are limited to the lower 16MB of _physical_ memory. * Note that addresses loaded into registers must be _physical_ addresses, * not logical addresses (which may differ if paging is active). * * Address mapping for channels 0-3: * * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) * | ... | | ... | | ... | * | ... | | ... | | ... | * | ... | | ... | | ... | * P7 ... P0 A7 ... A0 A7 ... A0 * | Page | Addr MSB | Addr LSB | (DMA registers) * * Address mapping for channels 5-7: * * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) * | ... | \ \ ... \ \ \ ... \ \ * | ... | \ \ ... \ \ \ ... \ (not used) * | ... | \ \ ... \ \ \ ... \ * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 * | Page | Addr MSB | Addr LSB | (DMA registers) * * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at * the hardware level, so odd-byte transfers aren't possible). * * Transfer count (_not # bytes_) is limited to 64K, represented as actual * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, * and up to 128K bytes may be transferred on channels 5-7 in one operation. * */ #define MAX_DMA_CHANNELS 8 /* The maximum address that we can perform a DMA transfer to on this platform */ /* Doesn't really apply... */ #define MAX_DMA_ADDRESS 0xFFFFFFFF /* 8237 DMA controllers */ #define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ #define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ /* DMA controller registers */ #define DMA1_CMD_REG 0x08 /* command register (w) */ #define DMA1_STAT_REG 0x08 /* status register (r) */ #define DMA1_REQ_REG 0x09 /* request register (w) */ #define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ #define DMA1_MODE_REG 0x0B /* mode register (w) */ #define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ #define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ #define DMA1_RESET_REG 0x0D /* Master Clear (w) */ #define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ #define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ #define DMA2_CMD_REG 0xD0 /* command register (w) */ #define DMA2_STAT_REG 0xD0 /* status register (r) */ #define DMA2_REQ_REG 0xD2 /* request register (w) */ #define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ #define DMA2_MODE_REG 0xD6 /* mode register (w) */ #define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ #define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ #define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ #define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ #define DMA_ADDR_0 0x00 /* DMA address registers */ #define DMA_ADDR_1 0x02 #define DMA_ADDR_2 0x04 #define DMA_ADDR_3 0x06 #define DMA_ADDR_4 0xC0 #define DMA_ADDR_5 0xC4 #define DMA_ADDR_6 0xC8 #define DMA_ADDR_7 0xCC #define DMA_CNT_0 0x01 /* DMA count registers */ #define DMA_CNT_1 0x03 #define DMA_CNT_2 0x05 #define DMA_CNT_3 0x07 #define DMA_CNT_4 0xC2 #define DMA_CNT_5 0xC6 #define DMA_CNT_6 0xCA #define DMA_CNT_7 0xCE #define DMA_LO_PAGE_0 0x87 /* DMA page registers */ #define DMA_LO_PAGE_1 0x83 #define DMA_LO_PAGE_2 0x81 #define DMA_LO_PAGE_3 0x82 #define DMA_LO_PAGE_5 0x8B #define DMA_LO_PAGE_6 0x89 #define DMA_LO_PAGE_7 0x8A #define DMA_HI_PAGE_0 0x487 /* DMA page registers */ #define DMA_HI_PAGE_1 0x483 #define DMA_HI_PAGE_2 0x481 #define DMA_HI_PAGE_3 0x482 #define DMA_HI_PAGE_5 0x48B #define DMA_HI_PAGE_6 0x489 #define DMA_HI_PAGE_7 0x48A #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ /* enable/disable a specific DMA channel */ static __inline__ void enable_dma(unsigned int dmanr) { if (dmanr != 4) { dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */ dma_outb(0, DMA2_CMD_REG); /* Enable group */ } if (dmanr<=3) { dma_outb(dmanr, DMA1_MASK_REG); dma_outb(0, DMA1_CMD_REG); /* Enable group */ } else { dma_outb(dmanr & 3, DMA2_MASK_REG); } } static __inline__ void disable_dma(unsigned int dmanr) { if (dmanr<=3) dma_outb(dmanr | 4, DMA1_MASK_REG); else dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); } /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. * Use this once to initialize the FF to a known state. * After that, keep track of it. :-) * --- In order to do that, the DMA routines below should --- * --- only be used while interrupts are disabled! --- */ static __inline__ void clear_dma_ff(unsigned int dmanr) { if (dmanr<=3) dma_outb(0, DMA1_CLEAR_FF_REG); else dma_outb(0, DMA2_CLEAR_FF_REG); } /* set mode (above) for a specific DMA channel */ static __inline__ void set_dma_mode(unsigned int dmanr, char mode) { if (dmanr<=3) dma_outb(mode | dmanr, DMA1_MODE_REG); else dma_outb(mode | (dmanr&3), DMA2_MODE_REG); } /* Set only the page register bits of the transfer address. * This is used for successive transfers when we know the contents of * the lower 16 bits of the DMA current address register, but a 64k boundary * may have been crossed. */ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr) { switch(dmanr) { case 0: dma_outb(pagenr, DMA_LO_PAGE_0); break; case 1: dma_outb(pagenr, DMA_LO_PAGE_1); break; case 2: dma_outb(pagenr, DMA_LO_PAGE_2); dma_outb(pagenr>>8, DMA_HI_PAGE_2); break; case 3: dma_outb(pagenr, DMA_LO_PAGE_3); break; case 5: dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5); break; case 6: dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6); break; case 7: dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7); break; } } /* Set transfer address & page bits for specific DMA channel. * Assumes dma flipflop is clear. */ static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) { if (dmanr <= 3) { dma_outb( phys & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); dma_outb( (phys>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); } else { dma_outb( (phys>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); dma_outb( (phys>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); } set_dma_page(dmanr, phys>>16); } /* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for * a specific DMA channel. * You must ensure the parameters are valid. * NOTE: from a manual: "the number of transfers is one more * than the initial word count"! This is taken into account. * Assumes dma flip-flop is clear. * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. */ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) { count--; if (dmanr <= 3) { dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); } else { dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); } } /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is * still in progress will return unpredictable results. * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. * * Assumes DMA flip-flop is clear. */ static __inline__ int get_dma_residue(unsigned int dmanr) { unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; /* using short to get 16-bit wrap around */ unsigned short count; count = 1 + dma_inb(io_port); count += dma_inb(io_port) << 8; return (dmanr<=3)? count : (count<<1); } /* These are in kernel/dma.c: */ /*extern int request_dma(unsigned int dmanr, char * device_id);*/ /* reserve a DMA channel */ extern void free_dma(unsigned int dmanr); /* release it again */ #endif /* _ASM_DMA_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/elf.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/elf.h?rev=1.1&content-type=text/x-cvsweb-markup Index: elf.h =================================================================== #ifndef __PPC_ELF_H #define __PPC_ELF_H /* * ELF register definitions.. */ #define ELF_NGREG 32 #define ELF_NFPREG 32 typedef unsigned long elf_greg_t; typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef double elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #define elf_check_arch(x) ((x) == EM_PPC) /* * These are used to set parameters in the core dumps. * FIXME(eric) I don't know what the correct endianness to use is. */ #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2LSB; #define ELF_ARCH EM_PPC #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/errno.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/errno.h?rev=1.1&content-type=text/x-cvsweb-markup Index: errno.h =================================================================== #ifndef _PPC_ERRNO_H #define _PPC_ERRNO_H #define EPERM 1 /* Operation not permitted */ #define ENOENT 2 /* No such file or directory */ #define ESRCH 3 /* No such process */ #define EINTR 4 /* Interrupted system call */ #define EIO 5 /* I/O error */ #define ENXIO 6 /* No such device or address */ #define E2BIG 7 /* Arg list too long */ #define ENOEXEC 8 /* Exec format error */ #define EBADF 9 /* Bad file number */ #define ECHILD 10 /* No child processes */ #define EAGAIN 11 /* Try again */ #define ENOMEM 12 /* Out of memory */ #define EACCES 13 /* Permission denied */ #define EFAULT 14 /* Bad address */ #define ENOTBLK 15 /* Block device required */ #define EBUSY 16 /* Device or resource busy */ #define EEXIST 17 /* File exists */ #define EXDEV 18 /* Cross-device link */ #define ENODEV 19 /* No such device */ #define ENOTDIR 20 /* Not a directory */ #define EISDIR 21 /* Is a directory */ #define EINVAL 22 /* Invalid argument */ #define ENFILE 23 /* File table overflow */ #define EMFILE 24 /* Too many open files */ #define ENOTTY 25 /* Not a typewriter */ #define ETXTBSY 26 /* Text file busy */ #define EFBIG 27 /* File too large */ #define ENOSPC 28 /* No space left on device */ #define ESPIPE 29 /* Illegal seek */ #define EROFS 30 /* Read-only file system */ #define EMLINK 31 /* Too many links */ #define EPIPE 32 /* Broken pipe */ #define EDOM 33 /* Math argument out of domain of func */ #define ERANGE 34 /* Math result not representable */ #define EDEADLK 35 /* Resource deadlock would occur */ #define ENAMETOOLONG 36 /* File name too long */ #define ENOLCK 37 /* No record locks available */ #define ENOSYS 38 /* Function not implemented */ #define ENOTEMPTY 39 /* Directory not empty */ #define ELOOP 40 /* Too many symbolic links encountered */ #define EWOULDBLOCK EAGAIN /* Operation would block */ #define ENOMSG 42 /* No message of desired type */ #define EIDRM 43 /* Identifier removed */ #define ECHRNG 44 /* Channel number out of range */ #define EL2NSYNC 45 /* Level 2 not synchronized */ #define EL3HLT 46 /* Level 3 halted */ #define EL3RST 47 /* Level 3 reset */ #define ELNRNG 48 /* Link number out of range */ #define EUNATCH 49 /* Protocol driver not attached */ #define ENOCSI 50 /* No CSI structure available */ #define EL2HLT 51 /* Level 2 halted */ #define EBADE 52 /* Invalid exchange */ #define EBADR 53 /* Invalid request descriptor */ #define EXFULL 54 /* Exchange full */ #define ENOANO 55 /* No anode */ #define EBADRQC 56 /* Invalid request code */ #define EBADSLT 57 /* Invalid slot */ #define EDEADLOCK 58 /* File locking deadlock error */ #define EBFONT 59 /* Bad font file format */ #define ENOSTR 60 /* Device not a stream */ #define ENODATA 61 /* No data available */ #define ETIME 62 /* Timer expired */ #define ENOSR 63 /* Out of streams resources */ #define ENONET 64 /* Machine is not on the network */ #define ENOPKG 65 /* Package not installed */ #define EREMOTE 66 /* Object is remote */ #define ENOLINK 67 /* Link has been severed */ #define EADV 68 /* Advertise error */ #define ESRMNT 69 /* Srmount error */ #define ECOMM 70 /* Communication error on send */ #define EPROTO 71 /* Protocol error */ #define EMULTIHOP 72 /* Multihop attempted */ #define EDOTDOT 73 /* RFS specific error */ #define EBADMSG 74 /* Not a data message */ #define EOVERFLOW 75 /* Value too large for defined data type */ #define ENOTUNIQ 76 /* Name not unique on network */ #define EBADFD 77 /* File descriptor in bad state */ #define EREMCHG 78 /* Remote address changed */ #define ELIBACC 79 /* Can not access a needed shared library */ #define ELIBBAD 80 /* Accessing a corrupted shared library */ #define ELIBSCN 81 /* .lib section in a.out corrupted */ #define ELIBMAX 82 /* Attempting to link in too many shared libraries */ #define ELIBEXEC 83 /* Cannot exec a shared library directly */ #define EILSEQ 84 /* Illegal byte sequence */ #define ERESTART 85 /* Interrupted system call should be restarted */ #define ESTRPIPE 86 /* Streams pipe error */ #define EUSERS 87 /* Too many users */ #define ENOTSOCK 88 /* Socket operation on non-socket */ #define EDESTADDRREQ 89 /* Destination address required */ #define EMSGSIZE 90 /* Message too long */ #define EPROTOTYPE 91 /* Protocol wrong type for socket */ #define ENOPROTOOPT 92 /* Protocol not available */ #define EPROTONOSUPPORT 93 /* Protocol not supported */ #define ESOCKTNOSUPPORT 94 /* Socket type not supported */ #define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ #define EPFNOSUPPORT 96 /* Protocol family not supported */ #define EAFNOSUPPORT 97 /* Address family not supported by protocol */ #define EADDRINUSE 98 /* Address already in use */ #define EADDRNOTAVAIL 99 /* Cannot assign requested address */ #define ENETDOWN 100 /* Network is down */ #define ENETUNREACH 101 /* Network is unreachable */ #define ENETRESET 102 /* Network dropped connection because of reset */ #define ECONNABORTED 103 /* Software caused connection abort */ #define ECONNRESET 104 /* Connection reset by peer */ #define ENOBUFS 105 /* No buffer space available */ #define EISCONN 106 /* Transport endpoint is already connected */ #define ENOTCONN 107 /* Transport endpoint is not connected */ #define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ #define ETOOMANYREFS 109 /* Too many references: cannot splice */ #define ETIMEDOUT 110 /* Connection timed out */ #define ECONNREFUSED 111 /* Connection refused */ #define EHOSTDOWN 112 /* Host is down */ #define EHOSTUNREACH 113 /* No route to host */ #define EALREADY 114 /* Operation already in progress */ #define EINPROGRESS 115 /* Operation now in progress */ #define ESTALE 116 /* Stale NFS file handle */ #define EUCLEAN 117 /* Structure needs cleaning */ #define ENOTNAM 118 /* Not a XENIX named type file */ #define ENAVAIL 119 /* No XENIX semaphores available */ #define EISNAM 120 /* Is a named type file */ #define EREMOTEIO 121 /* Remote I/O error */ #define EDQUOT 122 /* Quota exceeded */ #define ENOMEDIUM 123 /* No medium found */ #define EMEDIUMTYPE 124 /* Wrong medium type */ /* Should never be seen by user programs */ #define ERESTARTSYS 512 #define ERESTARTNOINTR 513 #define ERESTARTNOHAND 514 /* restart if no handler.. */ #define ENOIOCTLCMD 515 /* No ioctl command */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/fcntl.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/fcntl.h?rev=1.1&content-type=text/x-cvsweb-markup Index: fcntl.h =================================================================== #ifndef _PPC_FCNTL_H #define _PPC_FCNTL_H /* open/fcntl - O_SYNC is only implemented on blocks devices and on files located on an ext2 file system */ #define O_ACCMODE 0003 #define O_RDONLY 00 #define O_WRONLY 01 #define O_RDWR 02 #define O_CREAT 0100 /* not fcntl */ #define O_EXCL 0200 /* not fcntl */ #define O_NOCTTY 0400 /* not fcntl */ #define O_TRUNC 01000 /* not fcntl */ #define O_APPEND 02000 #define O_NONBLOCK 04000 #define O_NDELAY O_NONBLOCK #define O_SYNC 010000 #define FASYNC 020000 /* fcntl, for BSD compatibility */ #define F_DUPFD 0 /* dup */ #define F_GETFD 1 /* get f_flags */ #define F_SETFD 2 /* set f_flags */ #define F_GETFL 3 /* more flags (cloexec) */ #define F_SETFL 4 #define F_GETLK 5 #define F_SETLK 6 #define F_SETLKW 7 #define F_SETOWN 8 /* for sockets. */ #define F_GETOWN 9 /* for sockets. */ /* for F_[GET|SET]FL */ #define FD_CLOEXEC 1 /* actually anything with low bit set goes */ /* for posix fcntl() and lockf() */ #define F_RDLCK 0 #define F_WRLCK 1 #define F_UNLCK 2 /* for old implementation of bsd flock () */ #define F_EXLCK 4 /* or 3 */ #define F_SHLCK 8 /* or 4 */ /* operations for bsd flock(), also used by the kernel implementation */ #define LOCK_SH 1 /* shared lock */ #define LOCK_EX 2 /* exclusive lock */ #define LOCK_NB 4 /* or'd with one of the above to prevent blocking */ #define LOCK_UN 8 /* remove lock */ struct flock { short l_type; short l_whence; off_t l_start; off_t l_len; pid_t l_pid; }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/floppy.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/floppy.h?rev=1.1&content-type=text/x-cvsweb-markup Index: floppy.h =================================================================== /* * Architecture specific parts of the Floppy driver * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1995 */ #ifndef __ASM_PPC_FLOPPY_H #define __ASM_PPC_FLOPPY_H #define fd_inb(port) inb_p(port) #define fd_outb(port,value) outb_p(port,value) #define fd_enable_dma() enable_dma(FLOPPY_DMA) #define fd_disable_dma() disable_dma(FLOPPY_DMA) #define fd_request_dma() request_dma(FLOPPY_DMA,"floppy") #define fd_free_dma() free_dma(FLOPPY_DMA) #define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) #define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA,mode) #define fd_set_dma_addr(addr) set_dma_addr(FLOPPY_DMA,addr) #define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA,count) #define fd_enable_irq() enable_irq(FLOPPY_IRQ) #define fd_disable_irq() disable_irq(FLOPPY_IRQ) #define fd_cacheflush(addr,size) /* nothing */ #define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \ SA_INTERRUPT|SA_SAMPLE_RANDOM, \ "floppy", NULL) #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); __inline__ void virtual_dma_init(void) { /* Nothing to do on PowerPC */ } static int FDC1 = 0x3f0; static int FDC2 = -1; /* * Again, the CMOS information not available */ #define FLOPPY0_TYPE 6 #define FLOPPY1_TYPE 0 #define N_FDC 2 /* Don't change this! */ #define N_DRIVE 8 /* * The PowerPC has no problems with floppy DMA crossing 64k borders. */ #define CROSS_64KB(a,s) (0) #endif /* __ASM_PPC_FLOPPY_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/io.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/io.h?rev=1.1&content-type=text/x-cvsweb-markup Index: io.h =================================================================== #ifndef _PPC_IO_H #define _PPC_IO_H /* Define the particulars of outb/outw/outl "instructions" */ #define SLOW_DOWN_IO #ifndef PCI_DRAM_OFFSET #define PCI_DRAM_OFFSET 0x80000000 #endif #ifndef KERNELBASE #define KERNELBASE 0x90000000 #endif /* * The PCI bus is inherently Little-Endian. The PowerPC is being * run Big-Endian. Thus all values which cross the [PCI] barrier * must be endian-adjusted. Also, the local DRAM has a different * address from the PCI point of view, thus buffer addresses also * have to be modified [mapped] appropriately. */ extern inline unsigned long virt_to_bus(volatile void * address) { if (address == (void *)0) return 0; return ((unsigned long)((long)address - KERNELBASE + PCI_DRAM_OFFSET)); } extern inline void * bus_to_virt(unsigned long address) { if (address == 0) return 0; return ((void *)(address - PCI_DRAM_OFFSET + KERNELBASE)); } /* #define virt_to_bus(a) ((unsigned long)(((char *)a==(char *) 0) ? ((char *)0) \ : ((char *)((long)a - KERNELBASE + PCI_DRAM_OFFSET)))) #define bus_to_virt(a) ((void *) (((char *)a==(char *)0) ? ((char *)0) \ : ((char *)((long)a - PCI_DRAM_OFFSET + KERNELBASE)))) */ #define readb(addr) (*(volatile unsigned char *) (addr)) #define readw(addr) (*(volatile unsigned short *) (addr)) #define readl(addr) (*(volatile unsigned int *) (addr)) #define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b)) #define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b)) #define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) /* * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/i386 mapping (but if we ever * make the kernel segment mapped at 0, we need to do translation * on the i386 as well) */ extern inline unsigned long virt_to_phys(volatile void * address) { return (unsigned long) address; } extern inline void * phys_to_virt(unsigned long address) { return (void *) address; } /* from arch/ppc/kernel/port_io.c * -- Cort */ unsigned char inb(int port); unsigned short inw(int port); unsigned long inl(int port); unsigned char outb(unsigned char val,int port); unsigned short outw(unsigned short val,int port); unsigned long outl(unsigned long val,int port); void outsl(int port, long *ptr, int len); static inline unsigned char inb_p(int port) {return (inb(port)); } static inline unsigned short inw_p(int port) {return (inw(port)); } static inline unsigned long inl_p(int port) {return (inl(port)); } static inline unsigned char outb_p(unsigned char val,int port) { return (outb(val,port)); } static inline unsigned short outw_p(unsigned short val,int port) { return (outw(val,port)); } static inline unsigned long outl_p(unsigned long val,int port) { return (outl(val,port)); } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/ioctl.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/ioctl.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ioctl.h =================================================================== #ifndef _PPC_IOCTL_H #define _PPC_IOCTL_H /* * this was copied from the alpha as it's a bit cleaner there. * -- Cort */ #define _IOC_NRBITS 8 #define _IOC_TYPEBITS 8 #define _IOC_SIZEBITS 13 #define _IOC_DIRBITS 3 #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) #define _IOC_NRSHIFT 0 #define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) #define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) #define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) /* * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit. * And this turns out useful to catch old ioctl numbers in header * files for us. */ #define _IOC_NONE 1U #define _IOC_READ 2U #define _IOC_WRITE 4U #define _IOC(dir,type,nr,size) \ (((dir) << _IOC_DIRSHIFT) | \ ((type) << _IOC_TYPESHIFT) | \ ((nr) << _IOC_NRSHIFT) | \ ((size) << _IOC_SIZESHIFT)) /* used to create numbers */ #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) /* used to decode them.. */ #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/ioctls.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/ioctls.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ioctls.h =================================================================== #ifndef _ASM_PPC_IOCTLS_H #define _ASM_PPC_IOCTLS_H #include <asm/ioctl.h> #define FIOCLEX _IO('f', 1) #define FIONCLEX _IO('f', 2) #define FIOASYNC _IOW('f', 125, int) #define FIONBIO _IOW('f', 126, int) #define FIONREAD _IOR('f', 127, int) #define TIOCINQ FIONREAD #define TIOCGETP _IOR('t', 8, struct sgttyb) #define TIOCSETP _IOW('t', 9, struct sgttyb) #define TIOCSETN _IOW('t', 10, struct sgttyb) /* TIOCSETP wo flush */ #define TIOCSETC _IOW('t', 17, struct tchars) #define TIOCGETC _IOR('t', 18, struct tchars) #define TCGETS _IOR('t', 19, struct termios) #define TCSETS _IOW('t', 20, struct termios) #define TCSETSW _IOW('t', 21, struct termios) #define TCSETSF _IOW('t', 22, struct termios) #define TCGETA _IOR('t', 23, struct termio) #define TCSETA _IOW('t', 24, struct termio) #define TCSETAW _IOW('t', 25, struct termio) #define TCSETAF _IOW('t', 28, struct termio) #define TCSBRK _IO('t', 29) #define TCXONC _IO('t', 30) #define TCFLSH _IO('t', 31) #define TIOCSWINSZ _IOW('t', 103, struct winsize) #define TIOCGWINSZ _IOR('t', 104, struct winsize) #define TIOCSTART _IO('t', 110) /* start output, like ^Q */ #define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ #define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ #define TIOCGLTC _IOR('t', 116, struct ltchars) #define TIOCSLTC _IOW('t', 117, struct ltchars) #define TIOCSPGRP _IOW('t', 118, int) #define TIOCGPGRP _IOR('t', 119, int) #define TIOCEXCL 0x540C #define TIOCNXCL 0x540D #define TIOCSCTTY 0x540E #define TIOCSTI 0x5412 #define TIOCMGET 0x5415 #define TIOCMBIS 0x5416 #define TIOCMBIC 0x5417 #define TIOCMSET 0x5418 # define TIOCM_LE 0x001 # define TIOCM_DTR 0x002 # define TIOCM_RTS 0x004 # define TIOCM_ST 0x008 # define TIOCM_SR 0x010 # define TIOCM_CTS 0x020 # define TIOCM_CAR 0x040 # define TIOCM_RNG 0x080 # define TIOCM_DSR 0x100 # define TIOCM_CD TIOCM_CAR # define TIOCM_RI TIOCM_RNG #define TIOCGSOFTCAR 0x5419 #define TIOCSSOFTCAR 0x541A #define TIOCLINUX 0x541C #define TIOCCONS 0x541D #define TIOCGSERIAL 0x541E #define TIOCSSERIAL 0x541F #define TIOCPKT 0x5420 # define TIOCPKT_DATA 0 # define TIOCPKT_FLUSHREAD 1 # define TIOCPKT_FLUSHWRITE 2 # define TIOCPKT_STOP 4 # define TIOCPKT_START 8 # define TIOCPKT_NOSTOP 16 # define TIOCPKT_DOSTOP 32 #define TIOCNOTTY 0x5422 #define TIOCSETD 0x5423 #define TIOCGETD 0x5424 #define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ #define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ #define TIOCSERCONFIG 0x5453 #define TIOCSERGWILD 0x5454 #define TIOCSERSWILD 0x5455 #define TIOCGLCKTRMIOS 0x5456 #define TIOCSLCKTRMIOS 0x5457 #define TIOCSERGSTRUCT 0x5458 /* For debugging only */ #define TIOCSERGETLSR 0x5459 /* Get line status register */ /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ # define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ #define TIOCSERGETMULTI 0x545A /* Get multiport config */ #define TIOCSERSETMULTI 0x545B /* Set multiport config */ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ #endif /* _ASM_PPC_IOCTLS_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/irq.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/irq.h?rev=1.1&content-type=text/x-cvsweb-markup Index: irq.h =================================================================== #ifndef _ASM_IRQ_H #define _ASM_IRQ_H #define NR_IRQS 32 extern void disable_irq(unsigned int); extern void enable_irq(unsigned int); #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/mc146818rtc.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/mc146818rtc.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mc146818rtc.h =================================================================== /* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM * Copyright Torsten Duwe <duwe@i...> 1993 * derived from Data Sheet, Copyright Motorola 1984 (!). * It was written to be part of the Linux operating system. */ /* permission is hereby granted to copy, modify and redistribute this code * in terms of the GNU Library General Public License, Version 2 or later, * at your option. */ #ifndef _MC146818RTC_H #define _MC146818RTC_H #include <asm/io.h> #ifndef MCRTC_PORT #define MCRTC_PORT(x) (0x70 + (x)) #define MCRTC_ALWAYS_BCD 1 #endif #define CMOS_MCRTC_READ(addr) ({ \ outb_p((addr),MCRTC_PORT(0)); \ inb_p(MCRTC_PORT(1)); \ }) #define CMOS_MCRTC_WRITE(val, addr) ({ \ outb_p((addr),MCRTC_PORT(0)); \ outb_p((val),MCRTC_PORT(1)); \ }) /********************************************************************** * register summary **********************************************************************/ #define MCRTC_SECONDS 0 #define MCRTC_SECONDS_ALARM 1 #define MCRTC_MINUTES 2 #define MCRTC_MINUTES_ALARM 3 #define MCRTC_HOURS 4 #define MCRTC_HOURS_ALARM 5 /* RTC_*_alarm is always true if 2 MSBs are set */ # define MCRTC_ALARM_DONT_CARE 0xC0 #define MCRTC_DAY_OF_WEEK 6 #define MCRTC_DAY_OF_MONTH 7 #define MCRTC_MONTH 8 #define MCRTC_YEAR 9 /* control registers - Moto names */ #define MCRTC_REG_A 10 #define MCRTC_REG_B 11 #define MCRTC_REG_C 12 #define MCRTC_REG_D 13 /********************************************************************** * register details **********************************************************************/ #define MCRTC_FREQ_SELECT MCRTC_REG_A /* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, * totalling to a max high interval of 2.228 ms. */ # define MCRTC_UIP 0x80 # define MCRTC_DIV_CTL 0x70 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */ # define MCRTC_REF_CLCK_4MHZ 0x00 # define MCRTC_REF_CLCK_1MHZ 0x10 # define MCRTC_REF_CLCK_32KHZ 0x20 /* 2 values for divider stage reset, others for "testing purposes only" */ # define MCRTC_DIV_RESET1 0x60 # define MCRTC_DIV_RESET2 0x70 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */ # define MCRTC_RATE_SELECT 0x0F /**********************************************************************/ #define MCRTC_CONTROL MCRTC_REG_B # define MCRTC_SET 0x80 /* disable updates for clock setting */ # define MCRTC_PIE 0x40 /* periodic interrupt enable */ # define MCRTC_AIE 0x20 /* alarm interrupt enable */ # define MCRTC_UIE 0x10 /* update-finished interrupt enable */ # define MCRTC_SQWE 0x08 /* enable square-wave output */ # define MCRTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ # define MCRTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ # define MCRTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ /**********************************************************************/ #define MCRTC_INTR_FLAGS MCRTC_REG_C /* caution - cleared by read */ # define MCRTC_IRQF 0x80 /* any of the following 3 is active */ # define MCRTC_PF 0x40 # define MCRTC_AF 0x20 # define MCRTC_UF 0x10 /**********************************************************************/ #define MCRTC_VALID MCRTC_REG_D # define MCRTC_VRT 0x80 /* valid RAM and time */ /**********************************************************************/ /* example: !(CMOS_READ(MCRTC_CONTROL) & MCRTC_DM_BINARY) * determines if the following two #defines are needed */ #ifndef BCD_TO_BIN #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) #endif #ifndef BIN_TO_BCD #define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) #endif #endif /* _MC146818RTC_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/mman.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/mman.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mman.h =================================================================== #ifndef __PPC_MMAN_H__ #define __PPC_MMAN_H__ #define PROT_READ 0x1 /* page can be read */ #define PROT_WRITE 0x2 /* page can be written */ #define PROT_EXEC 0x4 /* page can be executed */ #define PROT_NONE 0x0 /* page can not be accessed */ #define MAP_SHARED 0x01 /* Share changes */ #define MAP_PRIVATE 0x02 /* Changes are private */ #define MAP_TYPE 0x0f /* Mask for type of mapping */ #define MAP_FIXED 0x10 /* Interpret addr exactly */ #define MAP_ANONYMOUS 0x20 /* don't use a file */ #define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */ #define MAP_GROWSDOWN 0x0100 /* stack-like segment */ #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ #define MAP_EXECUTABLE 0x1000 /* mark it as a executable */ #define MS_ASYNC 1 /* sync memory asynchronously */ #define MS_INVALIDATE 2 /* invalidate the caches */ #define MS_SYNC 4 /* synchronous memory sync */ #define MCL_CURRENT 0x2000 /* lock all currently mapped pages */ #define MCL_FUTURE 0x4000 /* lock all additions to address space */ /* compatibility flags */ #define MAP_ANON MAP_ANONYMOUS #define MAP_FILE 0 #endif /* __PPC_MMAN_H__ */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/mmu.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/mmu.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mmu.h =================================================================== /* * PowerPC memory management structures */ #ifndef _PPC_MMU_H_ #define _PPC_MMU_H_ /* Hardware Page Table Entry */ typedef struct _PTE { unsigned long v:1; /* Entry is valid */ unsigned long vsid:24; /* Virtual segment identifier */ unsigned long h:1; /* Hash algorithm indicator */ unsigned long api:6; /* Abbreviated page index */ unsigned long rpn:20; /* Real (physical) page number */ unsigned long :3; /* Unused */ unsigned long r:1; /* Referenced */ unsigned long c:1; /* Changed */ unsigned long w:1; /* Write-thru cache mode */ unsigned long i:1; /* Cache inhibited */ unsigned long m:1; /* Memory coherence */ unsigned long g:1; /* Guarded */ unsigned long :1; /* Unused */ unsigned long pp:2; /* Page protection */ } PTE; /* Values for PP (assumes Ks=0, Kp=1) */ #define PP_RWXX 0 /* Supervisor read/write, User none */ #define PP_RWRX 1 /* Supervisor read/write, User read */ #define PP_RWRW 2 /* Supervisor read/write, User read/write */ #define PP_RXRX 3 /* Supervisor read, User read */ /* Segment Register */ typedef struct _SEGREG { unsigned long t:1; /* Normal or I/O type */ unsigned long ks:1; /* Supervisor 'key' (normally 0) */ unsigned long kp:1; /* User 'key' (normally 1) */ unsigned long n:1; /* No-execute */ unsigned long :4; /* Unused */ unsigned long vsid:24; /* Virtual Segment Identifier */ } SEGREG; /* Block Address Translation (BAT) Registers */ typedef struct _BATU /* Upper part of BAT */ { unsigned long bepi:15; /* Effective page index (virtual address) */ unsigned long :4; /* Unused */ unsigned long bl:11; /* Block size mask */ unsigned long vs:1; /* Supervisor valid */ unsigned long vp:1; /* User valid */ } BATU; typedef struct _BATL /* Lower part of BAT */ { unsigned long brpn:15; /* Real page index (physical address) */ unsigned long :10; /* Unused */ unsigned long w:1; /* Write-thru cache */ unsigned long i:1; /* Cache inhibit */ unsigned long m:1; /* Memory coherence */ unsigned long g:1; /* Guarded (MBZ) */ unsigned long :1; /* Unused */ unsigned long pp:2; /* Page access protections */ } BATL; typedef struct _BAT { BATU batu; /* Upper register */ BATL batl; /* Lower register */ } BAT; /* Block size masks */ #define BL_128K 0x000 #define BL_256K 0x001 #define BL_512K 0x003 #define BL_1M 0x007 #define BL_2M 0x00F #define BL_4M 0x01F #define BL_8M 0x03F #define BL_16M 0x07F #define BL_32M 0x0FF #define BL_64M 0x1FF #define BL_128M 0x3FF #define BL_256M 0x7FF /* BAT Access Protection */ #define BPP_XX 0x00 /* No access */ #define BPP_RX 0x01 /* Read only */ #define BPP_RW 0x02 /* Read/write */ /* * Simulated two-level MMU. This structure is used by the kernel * to keep track of MMU mappings and is used to update/maintain * the hardware HASH table which is really a cache of mappings. * * The simulated structures mimic the hardware available on other * platforms, notably the 80x86 and 680x0. */ typedef struct _pte { unsigned long page_num:20; unsigned long flags:12; /* Page flags (with some unused bits) */ } pte; #define PD_SHIFT (10+12) /* Page directory */ #define PD_MASK 0x02FF #define PT_SHIFT (12) /* Page Table */ #define PT_MASK 0x02FF #define PG_SHIFT (12) /* Page Entry */ /* MMU context */ typedef struct _MMU_context { SEGREG segs[16]; /* Segment registers */ pte **pmap; /* Two-level page-map structure */ } MMU_context; #if 0 BAT ibat[4]; /* Instruction BAT images */ BAT dbat[4]; /* Data BAT images */ PTE *hash_table; /* Hardware hashed page table */ int hash_table_size; int hash_table_mask; unsigned long sdr; /* Hardware image of SDR */ #endif /* Used to set up SDR register */ #define HASH_TABLE_SIZE_64K 0x00010000 #define HASH_TABLE_SIZE_128K 0x00020000 #define HASH_TABLE_SIZE_256K 0x00040000 #define HASH_TABLE_SIZE_512K 0x00080000 #define HASH_TABLE_SIZE_1M 0x00100000 #define HASH_TABLE_SIZE_2M 0x00200000 #define HASH_TABLE_SIZE_4M 0x00400000 #define HASH_TABLE_MASK_64K 0x000 #define HASH_TABLE_MASK_128K 0x001 #define HASH_TABLE_MASK_256K 0x003 #define HASH_TABLE_MASK_512K 0x007 #define HASH_TABLE_MASK_1M 0x00F #define HASH_TABLE_MASK_2M 0x01F #define HASH_TABLE_MASK_4M 0x03F #define MMU_PAGE_SIZE 4096 extern int MMU_hash_page(struct thread_struct *tss, unsigned long va, pte *pg); #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/mmu_context.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/mmu_context.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mmu_context.h =================================================================== #ifndef __PPC_MMU_CONTEXT_H #define __PPC_MMU_CONTEXT_H /* * get a new mmu context.. PowerPC's don't know about contexts [yet] */ #define get_mmu_context(x) do { } while (0) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/nvram.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/nvram.h?rev=1.1&content-type=text/x-cvsweb-markup Index: nvram.h =================================================================== /* * PreP compliant NVRAM access */ #ifndef _PPC_NVRAM_H #define _PPC_NVRAM_H #define NVRAM_AS0 0x74 #define NVRAM_AS1 0x75 #define NVRAM_DATA 0x77 /* RTC Offsets */ #define RTC_SECONDS 0x1FF9 #define RTC_MINUTES 0x1FFA #define RTC_HOURS 0x1FFB #define RTC_DAY_OF_WEEK 0x1FFC #define RTC_DAY_OF_MONTH 0x1FFD #define RTC_MONTH 0x1FFE #define RTC_YEAR 0x1FFF #ifndef BCD_TO_BIN #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) #endif #ifndef BIN_TO_BCD #define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) #endif #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/page.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/page.h?rev=1.1&content-type=text/x-cvsweb-markup Index: page.h =================================================================== #ifndef _PPC_PAGE_H #define _PPC_PAGE_H /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 #define PAGE_SIZE (1UL << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) void invalidate(void); #ifdef __KERNEL__ #define STRICT_MM_TYPECHECKS #ifdef STRICT_MM_TYPECHECKS /* * These are used to make use of C type-checking.. */ typedef struct { unsigned long pte; } pte_t; typedef struct { unsigned long pmd; } pmd_t; typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) #define pmd_val(x) ((x).pmd) #define pgd_val(x) ((x).pgd) #define pgprot_val(x) ((x).pgprot) #define __pte(x) ((pte_t) { (x) } ) #define __pmd(x) ((pmd_t) { (x) } ) #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) #else /* * .. while these make it easier on the compiler */ typedef unsigned long pte_t; typedef unsigned long pmd_t; typedef unsigned long pgd_t; typedef unsigned long pgprot_t; #define pte_val(x) (x) #define pmd_val(x) (x) #define pgd_val(x) (x) #define pgprot_val(x) (x) #define __pte(x) (x) #define __pmd(x) (x) #define __pgd(x) (x) #define __pgprot(x) (x) #endif /* to align the pointer to the (next) page boundary */ #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) /* This handles the memory map.. */ #define KERNELBASE 0x90000000 #define PAGE_OFFSET KERNELBASE #define MAP_NR(addr) ((((unsigned long)addr) - PAGE_OFFSET) >> PAGE_SHIFT) #define MAP_PAGE_RESERVED (1<<15) #if 0 /* Now defined in "mm.h" */ /* * This used to be an unsigned short... * * -- Cort */ /*typedef unsigned short mem_map_t;*/ typedef struct { unsigned count:30, dirty:1, reserved:1; } mem_map_t; #endif /* Certain architectures need to do special things when pte's * within a page table are directly modified. Thus, the following * hook is made available. */ #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) #endif /* __KERNEL__ */ #endif /* _PPC_PAGE_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/param.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/param.h?rev=1.1&content-type=text/x-cvsweb-markup Index: param.h =================================================================== #ifndef _ASM_PPC_PARAM_H #define _ASM_PPC_PARAM_H #ifndef HZ #define HZ 100 #endif #define EXEC_PAGESIZE 4096 #ifndef NGROUPS #define NGROUPS 32 #endif #ifndef NOGROUP #define NOGROUP (-1) #endif #define MAXHOSTNAMELEN 64 /* max length of hostname */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/pgtable.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/pgtable.h?rev=1.1&content-type=text/x-cvsweb-markup Index: pgtable.h =================================================================== /* * Last edited: Nov 7 23:44 1995 (cort) */ #ifndef _PPC_PGTABLE_H #define _PPC_PGTABLE_H #include <asm/page.h> #include <asm/mmu.h> /* * Memory management on the PowerPC is a software emulation of the i386 * MMU folded onto the PowerPC hardware MMU. The emulated version looks * and behaves like the two-level i386 MMU. Entries from these tables * are merged into the PowerPC hashed MMU tables, on demand, treating the * hashed tables like a special cache. * * Since the PowerPC does not have separate kernel and user address spaces, * the user virtual address space must be a [proper] subset of the kernel * space. Thus, all tasks will have a specific virtual mapping for the * user virtual space and a common mapping for the kernel space. The * simplest way to split this was literally in half. Also, life is so * much simpler for the kernel if the machine hardware resources are * always mapped in. Thus, some additional space is given up to the * kernel space to accommodate this. * * CAUTION! Some of the trade-offs make sense for the PreP platform on * which this code was originally developed. When it migrates to other * PowerPC environments, some of the assumptions may fail and the whole * setup may need to be reevaluated. * * On the PowerPC, page translations are kept in a hashed table. There * is exactly one of these tables [although the architecture supports * an arbitrary number]. Page table entries move in/out of this hashed * structure on demand, with the kernel filling in entries as they are * needed. Just where a page table entry hits in the hashed table is a * function of the hashing which is in turn based on the upper 4 bits * of the logical address. These 4 bits address a "virtual segment id" * which is unique per task/page combination for user addresses and * fixed for the kernel addresses. Thus, the kernel space can be simply * shared [indeed at low overhead] among all tasks. * * The basic virtual address space is thus: * * 0x0XXXXXX --+ * 0x1XXXXXX | * 0x2XXXXXX | User address space. * 0x3XXXXXX | * 0x4XXXXXX | * 0x5XXXXXX | * 0x6XXXXXX | * 0x7XXXXXX --+ * 0x8XXXXXX PCI/ISA I/O space * 0x9XXXXXX --+ * 0xAXXXXXX | Kernel virtual memory * 0xBXXXXXX --+ * 0xCXXXXXX PCI/ISA Memory space * 0xDXXXXXX * 0xEXXXXXX * 0xFXXXXXX Board I/O space * * CAUTION! One of the real problems here is keeping the software * managed tables coherent with the hardware hashed tables. When * the software decides to update the table, it's normally easy to * update the hardware table. But when the hardware tables need * changed, e.g. as the result of a page fault, it's more difficult * to reflect those changes back into the software entries. Currently, * this process is quite crude, with updates causing the entire set * of tables to become invalidated. Some performance could certainly * be regained by improving this. * * The Linux memory management assumes a three-level page table setup. On * the i386, we use that, but "fold" the mid level into the top-level page * table, so that we physically have the same two-level page table as the * i386 mmu expects. * * This file contains the functions and defines necessary to modify and use * the i386 page table tree. */ /* PMD_SHIFT determines the size of the area a second-level page table can map */ #define PMD_SHIFT 22 #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) /* PGDIR_SHIFT determines what a third-level page table entry can map */ #define PGDIR_SHIFT 22 #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * entries per page directory level: the i386 is two-level, so * we don't really have any PMD directory physically. */ #define PTRS_PER_PTE 1024 #define PTRS_PER_PMD 1 #define PTRS_PER_PGD 1024 /* Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the * physical memory until the kernel virtual memory starts. That means that * any out-of-bounds memory accesses will hopefully be caught. * The vmalloc() routines leaves a hole of 4kB between each vmalloced * area for the same reason. ;) */ #define VMALLOC_OFFSET (8*1024*1024) #define VMALLOC_START ((high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) #define VMALLOC_VMADDR(x) ((unsigned long)(x)) #define _PAGE_PRESENT 0x001 #define _PAGE_RW 0x002 #define _PAGE_USER 0x004 #define _PAGE_PCD 0x010 #define _PAGE_ACCESSED 0x020 #define _PAGE_DIRTY 0x040 #define _PAGE_COW 0x200 /* implemented in software (one of the AVL bits) */ #define _PAGE_NO_CACHE 0x400 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED) #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_COW) #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED) #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED) #define PAGE_KERNEL_NO_CACHE __pgprot(_PAGE_NO_CACHE | _PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED) /* * The i386 can't do page protection for execute, and considers that the same are read. * Also, write permissions imply read permissions. This is the closest we can get.. */ #define __P000 PAGE_NONE #define __P001 PAGE_READONLY #define __P010 PAGE_COPY #define __P011 PAGE_COPY #define __P100 PAGE_READONLY #define __P101 PAGE_READONLY #define __P110 PAGE_COPY #define __P111 PAGE_COPY #define __S000 PAGE_NONE #define __S001 PAGE_READONLY #define __S010 PAGE_SHARED #define __S011 PAGE_SHARED #define __S100 PAGE_READONLY #define __S101 PAGE_READONLY #define __S110 PAGE_SHARED #define __S111 PAGE_SHARED /* * TLB invalidation: * * - invalidate() invalidates the current mm struct TLBs * - invalidate_all() invalidates all processes TLBs * - invalidate_mm(mm) invalidates the specified mm context TLB's * - invalidate_page(mm, vmaddr) invalidates one page * - invalidate_range(mm, start, end) invalidates a range of pages * * FIXME: This could be done much better! */ #define invalidate_all() printk("invalidate_all()\n");invalidate() #if 0 #define invalidate_mm(mm_struct) \ do { if ((mm_struct) == current->mm) invalidate(); else printk("Can't invalidate_mm(%x)\n", mm_struct);} while (0) #define invalidate_page(mm_struct,addr) \ do { if ((mm_struct) == current->mm) invalidate(); else printk("Can't invalidate_page(%x,%x)\n", mm_struct, addr);} while (0) #define invalidate_range(mm_struct,start,end) \ do { if ((mm_struct) == current->mm) invalidate(); else printk("Can't invalidate_range(%x,%x,%x)\n", mm_struct, start, end);} while (0) #endif /* * Define this if things work differently on a i386 and a i486: * it will (on a i486) warn about kernel memory accesses that are * done without a 'verify_area(VERIFY_WRITE,..)' */ #undef CONFIG_TEST_VERIFY_AREA /* page table for 0-4MB for everybody */ extern unsigned long pg0[1024]; /* * BAD_PAGETABLE is used when we need a bogus page-table, while * BAD_PAGE is used for a bogus page. * * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ extern pte_t __bad_page(void); extern pte_t * __bad_pagetable(void); extern unsigned long __zero_page(void); #define BAD_PAGETABLE __bad_pagetable() #define BAD_PAGE __bad_page() #define ZERO_PAGE __zero_page() /* number of bits that fit into a memory pointer */ #define BITS_PER_PTR (8*sizeof(unsigned long)) /* to align the pointer to a pointer address */ #define PTR_MASK (~(sizeof(void*)-1)) /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ /* 64-bit machines, beware! SRB. */ #define SIZEOF_PTR_LOG2 2 /* to find an entry in a page-table */ #define PAGE_PTR(address) \ ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) /* to set the page-dir */ /* tsk is a task_struct and pgdir is a pte_t */ #define SET_PAGE_DIR(tsk,pgdir) \ do { \ (tsk)->tss.pg_tables = (unsigned long *)(pgdir); \ if ((tsk) == current) \ { \ /*_printk("Change page tables = %x\n", pgdir);*/ \ } \ } while (0) extern unsigned long high_memory; extern inline int pte_none(pte_t pte) { return !pte_val(pte); } extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } #if 0 extern inline int pte_inuse(pte_t *ptep) { return mem_map[MAP_NR(ptep)].reserved; } /*extern inline int pte_inuse(pte_t *ptep) { return mem_map[MAP_NR(ptep)] != 1; }*/ #endif extern inline void pte_clear(pte_t *ptep) { pte_val(*ptep) = 0; } #if 0 extern inline void pte_reuse(pte_t * ptep) { if (!mem_map[MAP_NR(ptep)].reserved) mem_map[MAP_NR(ptep)].count++; } #endif /* extern inline void pte_reuse(pte_t * ptep) { if (!(mem_map[MAP_NR(ptep)] & MAP_PAGE_RESERVED)) mem_map[MAP_NR(ptep)]++; } */ extern inline int pmd_none(pmd_t pmd) { return !pmd_val(pmd); } extern inline int pmd_bad(pmd_t pmd) { return (pmd_val(pmd) & ~PAGE_MASK) != _PAGE_TABLE; } extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _PAGE_PRESENT; } extern inline int pmd_inuse(pmd_t *pmdp) { return 0; } extern inline void pmd_clear(pmd_t * pmdp) { pmd_val(*pmdp) = 0; } extern inline void pmd_reuse(pmd_t * pmdp) { } /* * The "pgd_xxx()" functions here are trivial for a folded two-level * setup: the pgd is never bad, and a pmd always exists (as it's folded * into the pgd entry) */ extern inline int pgd_none(pgd_t pgd) { return 0; } extern inline int pgd_bad(pgd_t pgd) { return 0; } extern inline int pgd_present(pgd_t pgd) { return 1; } #if 0 /*extern inline int pgd_inuse(pgd_t * pgdp) { return mem_map[MAP_NR(pgdp)] != 1; }*/ extern inline int pgd_inuse(pgd_t *pgdp) { return mem_map[MAP_NR(pgdp)].reserved; } #endif extern inline void pgd_clear(pgd_t * pgdp) { } /* extern inline void pgd_reuse(pgd_t * pgdp) { if (!mem_map[MAP_NR(pgdp)].reserved) mem_map[MAP_NR(pgdp)].count++; } */ /* * The following only work if pte_present() is true. * Undefined behaviour if not.. */ extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; } extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } extern inline int pte_cow(pte_t pte) { return pte_val(pte) & _PAGE_COW; } extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_RW; return pte; } extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_USER; return pte; } extern inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_USER; return pte; } extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; } extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } extern inline pte_t pte_uncow(pte_t pte) { pte_val(pte) &= ~_PAGE_COW; return pte; } extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pte; } extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_USER; return pte; } extern inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) |= _PAGE_USER; return pte; } extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; } extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; } extern inline pte_t pte_mkcow(pte_t pte) { pte_val(pte) |= _PAGE_COW; return pte; } /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot) { pte_t pte; pte_val(pte) = page | pgprot_val(pgprot); return pte; } extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } /*extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep) { pmd_val(*pmdp) = _PAGE_TABLE | ((((unsigned long) ptep) - PAGE_OFFSET) << (32-PAGE_SHIFT)); } */ extern inline unsigned long pte_page(pte_t pte) { return pte_val(pte) & PAGE_MASK; } extern inline unsigned long pmd_page(pmd_t pmd) { return pmd_val(pmd) & PAGE_MASK; } /* to find an entry in a page-table-directory */ extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) { return mm->pgd + (address >> PGDIR_SHIFT); } /* Find an entry in the second-level page table.. */ extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) { return (pmd_t *) dir; } /* Find an entry in the third-level page table.. */ extern inline pte_t * pte_offset(pmd_t * dir, unsigned long address) { return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); } /* * Allocate and free page tables. The xxx_kernel() versions are * used to allocate a kernel page table - this turns on ASN bits * if any, and marks the page tables reserved. */ extern inline void pte_free_kernel(pte_t * pte) { free_page((unsigned long) pte); } /*extern inline void pte_free_kernel(pte_t * pte) { mem_map[MAP_NR(pte)] = 1; free_page((unsigned long) pte); } */ /* extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) { address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); if (pmd_none(*pmd)) { pte_t * page = (pte_t *) get_free_page(GFP_KERNEL); if (pmd_none(*pmd)) { if (page) { pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) page; mem_map[MAP_NR(page)] = MAP_PAGE_RESERVED; return page + address; } pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE; return NULL; } free_page((unsigned long) page); } if (pmd_bad(*pmd)) { printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd)); pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE; return NULL; } return (pte_t *) pmd_page(*pmd) + address; }*/ /* extern inline pte_t * pte_alloc_kernel(pmd_t *pmd, unsigned long address) { printk("pte_alloc_kernel pmd = %08X, address = %08X\n", pmd, address); address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); printk("address now = %08X\n", address); if (pmd_none(*pmd)) { pte_t *page; printk("pmd_none(*pmd) true\n"); page = (pte_t *) get_free_page(GFP_KERNEL); printk("page = %08X after get_free_page(%08X)\n",page,GFP_KERNEL); if (pmd_none(*pmd)) { printk("pmd_none(*pmd=%08X) still\n",*pmd); if (page) { printk("page true = %08X\n",page); pmd_set(pmd, page); printk("pmd_set(%08X,%08X)\n",pmd,page); mem_map[MAP_NR(page)].reserved = 1; printk("did mem_map\n",pmd,page); return page + address; } printk("did pmd_set(%08X, %08X\n",pmd,BAD_PAGETABLE); pmd_set(pmd, (pte_t *) BAD_PAGETABLE); return NULL; } printk("did free_page(%08X)\n",page); free_page((unsigned long) page); } if (pmd_bad(*pmd)) { printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd)); pmd_set(pmd, (pte_t *) BAD_PAGETABLE); return NULL; } printk("returning pmd_page(%08X) + %08X\n",pmd_page(*pmd) , address); return (pte_t *) pmd_page(*pmd) + address; } */ extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) { address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); if (pmd_none(*pmd)) { pte_t * page = (pte_t *) get_free_page(GFP_KERNEL); if (pmd_none(*pmd)) { if (page) { /* pmd_set(pmd,page);*/ pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) page; return page + address; } /* pmd_set(pmd, BAD_PAGETABLE);*/ pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE; return NULL; } free_page((unsigned long) page); } if (pmd_bad(*pmd)) { printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd)); /* pmd_set(pmd, (pte_t *) BAD_PAGETABLE); */ pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE; return NULL; } return (pte_t *) pmd_page(*pmd) + address; } /* * allocating and freeing a pmd is trivial: the 1-entry pmd is * inside the pgd, so has no extra memory associated with it. */ extern inline void pmd_free_kernel(pmd_t * pmd) { } extern inline pmd_t * pmd_alloc_kernel(pgd_t * pgd, unsigned long address) { return (pmd_t *) pgd; } extern inline void pte_free(pte_t * pte) { free_page((unsigned long) pte); } extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) { address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); if (pmd_none(*pmd)) { pte_t * page = (pte_t *) get_free_page(GFP_KERNEL); if (pmd_none(*pmd)) { if (page) { pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) page; return page + address; } pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE; return NULL; } free_page((unsigned long) page); } if (pmd_bad(*pmd)) { printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd)); pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE; return NULL; } return (pte_t *) pmd_page(*pmd) + address; } /* * allocating and freeing a pmd is trivial: the 1-entry pmd is * inside the pgd, so has no extra memory associated with it. */ extern inline void pmd_free(pmd_t * pmd) { } extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address) { return (pmd_t *) pgd; } extern inline void pgd_free(pgd_t * pgd) { free_page((unsigned long) pgd); } extern inline pgd_t * pgd_alloc(void) { return (pgd_t *) get_free_page(GFP_KERNEL); } extern pgd_t swapper_pg_dir[1024*8]; /*extern pgd_t *swapper_pg_dir;*/ /* * Software maintained MMU tables may have changed -- update the * hardware [aka cache] */ extern inline void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t _pte) { #if 0 printk("Update MMU cache - VMA: %x, Addr: %x, PTE: %x\n", vma, address, *(long *)&_pte); _printk("Update MMU cache - VMA: %x, Addr: %x, PTE: %x\n", vma, address, *(long *)&_pte); /* MMU_hash_page(&(vma->vm_task)->tss, address & PAGE_MASK, (pte *)&_pte);*/ #endif MMU_hash_page(&(current)->tss, address & PAGE_MASK, (pte *)&_pte); } #ifdef _SCHED_INIT_ #define INIT_MMAP { &init_task, 0, 0x40000000, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC } #endif #define SWP_TYPE(entry) (((entry) >> 1) & 0x7f) #define SWP_OFFSET(entry) ((entry) >> 8) #define SWP_ENTRY(type,offset) (((type) << 1) | ((offset) << 8)) #endif /* _PPC_PAGE_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/posix_types.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/posix_types.h?rev=1.1&content-type=text/x-cvsweb-markup Index: posix_types.h =================================================================== #ifndef _PPC_POSIX_TYPES_H #define _PPC_POSIX_TYPES_H /* * This file is generally used by user-level software, so you need to * be a little careful about namespace pollution etc. Also, we cannot * assume GCC is being used. */ typedef unsigned int __kernel_dev_t; typedef unsigned int __kernel_ino_t; typedef unsigned int __kernel_mode_t; typedef unsigned short __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef unsigned int __kernel_uid_t; typedef unsigned int __kernel_gid_t; typedef unsigned long __kernel_size_t; typedef long __kernel_ssize_t; typedef long __kernel_ptrdiff_t; typedef long __kernel_time_t; typedef long __kernel_clock_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; #ifdef __GNUC__ typedef long long __kernel_loff_t; #endif typedef struct { int val[2]; } __kernel_fsid_t; #ifndef __GNUC__ #define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) #define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) #define __FD_ZERO(set) \ ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) #else /* __GNUC__ */ /* With GNU C, use inline functions instead so args are evaluated only once: */ #undef __FD_SET static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) { unsigned long _tmp = fd / __NFDBITS; unsigned long _rem = fd % __NFDBITS; fdsetp->fds_bits[_tmp] |= (1UL<<_rem); } #undef __FD_CLR static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) { unsigned long _tmp = fd / __NFDBITS; unsigned long _rem = fd % __NFDBITS; fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); } #undef __FD_ISSET static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p) { unsigned long _tmp = fd / __NFDBITS; unsigned long _rem = fd % __NFDBITS; return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; } /* * This will unroll the loop for the normal constant case (8 ints, * for a 256-bit fd_set) */ #undef __FD_ZERO static __inline__ void __FD_ZERO(__kernel_fd_set *p) { unsigned int *tmp = p->fds_bits; int i; if (__builtin_constant_p(__FDSET_LONGS)) { switch (__FDSET_LONGS) { case 8: tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0; tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0; return; } } i = __FDSET_LONGS; while (i) { i--; *tmp = 0; tmp++; } } #endif /* __GNUC__ */ #endif /* _PPC_POSIX_TYPES_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/ppc_machine.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/ppc_machine.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ppc_machine.h =================================================================== /* * PowerPC machine specifics */ #ifndef _PPC_MACHINE_H_ #define _PPC_MACHINE_H_ /* Bit encodings for Machine State Register (MSR) */ #define MSR_POW (1<<18) /* Enable Power Management */ #define MSR_TGPR (1<<17) /* TLB Update registers in use */ #define MSR_ILE (1<<16) /* Interrupt Little-Endian enable */ #define MSR_EE (1<<15) /* External Interrupt enable */ #define MSR_PR (1<<14) /* Supervisor/User privilege */ #define MSR_FP (1<<13) /* Floating Point enable */ #define MSR_ME (1<<12) /* Machine Check enable */ #define MSR_FE0 (1<<11) /* Floating Exception mode 0 */ #define MSR_SE (1<<10) /* Single Step */ #define MSR_BE (1<<9) /* Branch Trace */ #define MSR_FE1 (1<<8) /* Floating Exception mode 1 */ #define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */ #define MSR_IR (1<<5) /* Instruction MMU enable */ #define MSR_DR (1<<4) /* Data MMU enable */ #define MSR_RI (1<<1) /* Recoverable Exception */ #define MSR_LE (1<<0) /* Little-Endian enable */ #define MSR_ MSR_FP|MSR_FE0|MSR_FE1|MSR_ME #define MSR_USER MSR_|MSR_PR|MSR_EE|MSR_IR|MSR_DR /* Bit encodings for Hardware Implementation Register (HID0) */ #define HID0_EMCP (1<<31) /* Enable Machine Check pin */ #define HID0_EBA (1<<29) /* Enable Bus Address Parity */ #define HID0_EBD (1<<28) /* Enable Bus Data Parity */ #define HID0_SBCLK (1<<27) #define HID0_EICE (1<<26) #define HID0_ECLK (1<<25) #define HID0_PAR (1<<24) #define HID0_DOZE (1<<23) #define HID0_NAP (1<<22) #define HID0_SLEEP (1<<21) #define HID0_DPM (1<<20) #define HID0_ICE (1<<15) /* Instruction Cache Enable */ #define HID0_DCE (1<<14) /* Data Cache Enable */ #define HID0_ILOCK (1<<13) /* Instruction Cache Lock */ #define HID0_DLOCK (1<<12) /* Data Cache Lock */ #define HID0_ICFI (1<<11) /* Instruction Cache Flash Invalidate */ #define HID0_DCI (1<<10) /* Data Cache Invalidate */ #define HID0_SIED (1<<7) /* Serial Instruction Execution [Disable] */ #define HID0_BHTE (1<<2) /* Branch History Table Enable */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/processor.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/processor.h?rev=1.1&content-type=text/x-cvsweb-markup Index: processor.h =================================================================== #ifndef __ASM_PPC_PROCESSOR_H #define __ASM_PPC_PROCESSOR_H /* * PowerPC machine specifics */ #ifndef _PPC_MACHINE_H_ #define _PPC_MACHINE_H_ /* Bit encodings for Machine State Register (MSR) */ #define MSR_POW (1<<18) /* Enable Power Management */ #define MSR_TGPR (1<<17) /* TLB Update registers in use */ #define MSR_ILE (1<<16) /* Interrupt Little-Endian enable */ #define MSR_EE (1<<15) /* External Interrupt enable */ #define MSR_PR (1<<14) /* Supervisor/User privilege */ #define MSR_FP (1<<13) /* Floating Point enable */ #define MSR_ME (1<<12) /* Machine Check enable */ #define MSR_FE0 (1<<11) /* Floating Exception mode 0 */ #define MSR_SE (1<<10) /* Single Step */ #define MSR_BE (1<<9) /* Branch Trace */ #define MSR_FE1 (1<<8) /* Floating Exception mode 1 */ #define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */ #define MSR_IR (1<<5) /* Instruction MMU enable */ #define MSR_DR (1<<4) /* Data MMU enable */ #define MSR_RI (1<<1) /* Recoverable Exception */ #define MSR_LE (1<<0) /* Little-Endian enable */ #define MSR_ MSR_FP|MSR_FE0|MSR_FE1|MSR_ME #define MSR_USER MSR_|MSR_PR|MSR_EE|MSR_IR|MSR_DR /* Bit encodings for Hardware Implementation Register (HID0) */ #define HID0_EMCP (1<<31) /* Enable Machine Check pin */ #define HID0_EBA (1<<29) /* Enable Bus Address Parity */ #define HID0_EBD (1<<28) /* Enable Bus Data Parity */ #define HID0_SBCLK (1<<27) #define HID0_EICE (1<<26) #define HID0_ECLK (1<<25) #define HID0_PAR (1<<24) #define HID0_DOZE (1<<23) #define HID0_NAP (1<<22) #define HID0_SLEEP (1<<21) #define HID0_DPM (1<<20) #define HID0_ICE (1<<15) /* Instruction Cache Enable */ #define HID0_DCE (1<<14) /* Data Cache Enable */ #define HID0_ILOCK (1<<13) /* Instruction Cache Lock */ #define HID0_DLOCK (1<<12) /* Data Cache Lock */ #define HID0_ICFI (1<<11) /* Instruction Cache Flash Invalidate */ #define HID0_DCI (1<<10) /* Data Cache Invalidate */ #endif static inline void start_thread(struct pt_regs * regs, unsigned long eip, unsigned long esp) { regs->nip = eip; regs->gpr[1] = esp; regs->msr = MSR_USER; } /* * Bus types */ #define EISA_bus 0 #define EISA_bus__is_a_macro /* for versions in ksyms.c */ #define MCA_bus 0 #define MCA_bus__is_a_macro /* for versions in ksyms.c */ /* * Write Protection works right in supervisor mode on the PowerPC */ #define wp_works_ok 1 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ /* * User space process size: 2GB. This is hardcoded into a few places, * so don't change it unless you know what you are doing. * * "this is gonna have to change to 1gig for the sparc" - David S. Miller */ #define TASK_SIZE (0x80000000UL) #define MAX_USER_ADDR TASK_SIZE #define MMAP_SEARCH_START (TASK_SIZE/3) struct thread_struct { unsigned long ksp; /* Kernel stack pointer */ unsigned long *pg_tables; /* MMU information */ unsigned long segs[16]; /* MMU Segment registers */ unsigned long last_pc; /* PC when last entered system */ unsigned long user_stack; /* [User] Stack when entered kernel */ double fpr[32]; /* Complete floating point set */ unsigned long wchan; /* Event task is sleeping on */ unsigned long *regs; /* Pointer to saved register state */ }; #define INIT_TSS { \ 0, 0, {0}, \ 0, 0, {0}, \ } #define INIT_MMAP { &init_mm, 0, 0x40000000, \ PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC } #define alloc_kernel_stack() get_free_page(GFP_KERNEL) #define free_kernel_stack(page) free_page((page)) /* * Return saved PC of a blocked thread. For now, this is the "user" PC */ static inline unsigned long thread_saved_pc(struct thread_struct *t) { return (t->last_pc); } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/ptrace.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/ptrace.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ptrace.h =================================================================== #ifndef _PPC_PTRACE_H #define _PPC_PTRACE_H /* * This struct defines the way the registers are stored on the * kernel stack during a system call or other kernel entry. * Note: the "_overhead" and "_underhead" spaces are stack locations * used by called routines. Because of the way the PowerPC ABI * specifies the function prologue/epilogue, registers can be * saved in stack locations which are below the current stack * pointer (_underhead). If an interrupt occurs during this * [albeit] small time interval, registers which were saved on * the stack could be trashed by the interrupt save code. The * "_underhead" leaves a hole just in case this happens. It also * wastes 80 bytes of stack if it doesn't! Similarly, the called * routine stores some information "above" the stack pointer before * if gets adjusted. This is covered by the "_overhead" field * and [thankfully] is not totally wasted. * */ struct pt_regs { unsigned long _overhead[14]; /* Callee's SP,LR,params */ unsigned long gpr[32]; unsigned long nip; unsigned long msr; unsigned long ctr; unsigned long link; unsigned long ccr; unsigned long xer; unsigned long dar; /* Fault registers */ unsigned long dsisr; unsigned long hash1, hash2; unsigned long imiss, dmiss; unsigned long icmp, dcmp; unsigned long orig_gpr3; /* Used for restarting system calls */ unsigned long result; /* Result of a system call */ double fpr[4]; /* Caution! Only FP0-FP3 save on interrupts */ double fpcsr; unsigned long trap; /* Reason for being here */ unsigned long marker; /* Should have DEADDEAD */ unsigned long _underhead[20]; /* Callee's register save area */ unsigned long edx; /* for binfmt_elf.c which wants edx */ }; #define instruction_pointer(regs) ((regs)->nip) #define user_mode(regs) ((regs)->msr & 0x4000) #ifdef KERNEL extern void show_regs(struct pt_regs *); #endif /* Offsets used by 'ptrace' system call interface */ /* Note: these should correspond to gpr[x] */ #define PT_R0 0 #define PT_R1 1 #define PT_R2 2 #define PT_R3 3 #define PT_R4 4 #define PT_R5 5 #define PT_R6 6 #define PT_R7 7 #define PT_R8 8 #define PT_R9 9 #define PT_R10 10 #define PT_R11 11 #define PT_R12 12 #define PT_R13 13 #define PT_R14 14 #define PT_R15 15 #define PT_R16 16 #define PT_R17 17 #define PT_R18 18 #define PT_R19 19 #define PT_R20 20 #define PT_R21 21 #define PT_R22 22 #define PT_R23 23 #define PT_R24 24 #define PT_R25 25 #define PT_R26 26 #define PT_R27 27 #define PT_R28 28 #define PT_R29 29 #define PT_R30 30 #define PT_R31 31 #define PT_NIP 32 #define PT_MSR 33 #define PT_ORIG_R3 34 #define PT_CTR 35 #define PT_LNK 36 #define PT_XER 37 #define PT_CCR 38 #define PT_FPR0 48 #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/resource.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/resource.h?rev=1.1&content-type=text/x-cvsweb-markup Index: resource.h =================================================================== #ifndef _PPC_RESOURCE_H #define _PPC_RESOURCE_H /* * Resource limits */ #define RLIMIT_CPU 0 /* CPU time in ms */ #define RLIMIT_FSIZE 1 /* Maximum filesize */ #define RLIMIT_DATA 2 /* max data size */ #define RLIMIT_STACK 3 /* max stack size */ #define RLIMIT_CORE 4 /* max core file size */ #define RLIMIT_RSS 5 /* max resident set size */ #define RLIMIT_NPROC 6 /* max number of processes */ #define RLIMIT_NOFILE 7 /* max number of open files */ #define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space */ #define RLIM_NLIMITS 9 #ifdef __KERNEL__ #define INIT_RLIMITS \ { \ { LONG_MAX, LONG_MAX }, \ { LONG_MAX, LONG_MAX }, \ { LONG_MAX, LONG_MAX }, \ { _STK_LIM, _STK_LIM }, \ { 0, LONG_MAX }, \ { LONG_MAX, LONG_MAX }, \ { MAX_TASKS_PER_USER, MAX_TASKS_PER_USER }, \ { NR_OPEN, NR_OPEN }, \ { LONG_MAX, LONG_MAX }, \ } #endif /* __KERNEL__ */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/segment.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/segment.h?rev=1.1&content-type=text/x-cvsweb-markup Index: segment.h =================================================================== #ifndef _ASM_PPC_SEGMENT_H #define _ASM_PPC_SEGMENT_H #include <linux/string.h> #define put_user(x,ptr) __put_user((unsigned long)(x),(ptr),sizeof(*(ptr))) #define get_user(ptr) ((__typeof__(*(ptr)))__get_user((ptr),sizeof(*(ptr)))) extern int bad_user_access_length(void); static inline void __put_user(unsigned long x, void * y, int size) { switch (size) { case 1: *(char *) y = x; break; case 2: *(short *) y = x; break; case 4: *(int *) y = x; break; case 8: *(long *) y = x; break; default: bad_user_access_length(); } } static inline unsigned long __get_user(const void * y, int size) { switch (size) { case 1: return *(unsigned char *) y; case 2: return *(unsigned short *) y; case 4: return *(unsigned int *) y; case 8: return *(unsigned long *) y; default: return bad_user_access_length(); } } static inline unsigned char get_user_byte(const char * addr) { return *addr; } #define get_fs_byte(addr) get_user_byte((char *)(addr)) static inline unsigned short get_user_word(const short *addr) { return *addr; } #define get_fs_word(addr) get_user_word((short *)(addr)) static inline unsigned long get_user_long(const int *addr) { return *addr; } #define get_fs_long(addr) get_user_long((int *)(addr)) static inline unsigned long get_user_quad(const long *addr) { return *addr; } #define get_fs_quad(addr) get_user_quad((long *)(addr)) static inline void put_user_byte(char val,char *addr) { *addr = val; } #define put_fs_byte(x,addr) put_user_byte((x),(char *)(addr)) static inline void put_user_word(short val,short * addr) { *addr = val; } #define put_fs_word(x,addr) put_user_word((x),(short *)(addr)) static inline void put_user_long(unsigned long val,int * addr) { *addr = val; } #define put_fs_long(x,addr) put_user_long((x),(int *)(addr)) static inline void put_user_quad(unsigned long val,long * addr) { *addr = val; } #define put_fs_quad(x,addr) put_user_quad((x),(long *)(addr)) #define memcpy_fromfs(to, from, n) memcpy((to),(from),(n)) #define memcpy_tofs(to, from, n) memcpy((to),(from),(n)) /* * For segmented architectures, these are used to specify which segment * to use for the above functions. * * The powerpc is not segmented, so these are just dummies. */ #define KERNEL_DS 0 #define USER_DS 1 static inline unsigned long get_fs(void) { return 0; } static inline unsigned long get_ds(void) { return 0; } static inline void set_fs(unsigned long val) { } #endif /* _ASM_SEGMENT_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/shmparam.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/shmparam.h?rev=1.1&content-type=text/x-cvsweb-markup Index: shmparam.h =================================================================== #ifndef _PPC_SHMPARAM_H #define _PPC_SHMPARAM_H /* address range for shared memory attaches if no address passed to shmat() */ #define SHM_RANGE_START 0x50000000 #define SHM_RANGE_END 0x60000000 /* * Format of a swap-entry for shared memory pages currently out in * swap space (see also mm/swap.c). * * SWP_TYPE = SHM_SWP_TYPE * SWP_OFFSET is used as follows: * * bits 0..6 : id of shared memory segment page belongs to (SHM_ID) * bits 7..21: index of page within shared memory segment (SHM_IDX) * (actually fewer bits get used since SHMMAX is so low) */ /* * Keep _SHM_ID_BITS as low as possible since SHMMNI depends on it and * there is a static array of size SHMMNI. */ #define _SHM_ID_BITS 7 #define SHM_ID_MASK ((1<<_SHM_ID_BITS)-1) #define SHM_IDX_SHIFT (_SHM_ID_BITS) #define _SHM_IDX_BITS 15 #define SHM_IDX_MASK ((1<<_SHM_IDX_BITS)-1) /* * _SHM_ID_BITS + _SHM_IDX_BITS must be <= 24 on the i386 and * SHMMAX <= (PAGE_SIZE << _SHM_IDX_BITS). */ #define SHMMAX 0x3fa000 /* max shared seg size (bytes) */ #define SHMMIN 1 /* really PAGE_SIZE */ /* min shared seg size (bytes) */ #define SHMMNI (1<<_SHM_ID_BITS) /* max num of segs system wide */ #define SHMALL /* max shm system wide (pages) */ \ (1<<(_SHM_IDX_BITS+_SHM_ID_BITS)) #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ #define SHMSEG SHMMNI /* max shared segs per process */ #endif /* _PPC_SHMPARAM_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/sigcontext.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/sigcontext.h?rev=1.1&content-type=text/x-cvsweb-markup Index: sigcontext.h =================================================================== #ifndef _ASM_PPC_SIGCONTEXT_H #define _ASM_PPC_SIGCONTEXT_H #include <asm/ptrace.h> struct sigcontext_struct { unsigned long _unused[4]; int signal; unsigned long handler; unsigned long oldmask; struct pt_regs *regs; }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/signal.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/signal.h?rev=1.1&content-type=text/x-cvsweb-markup Index: signal.h =================================================================== #ifndef _ASMPPC_SIGNAL_H #define _ASMPPC_SIGNAL_H typedef unsigned long sigset_t; /* at least 32 bits */ #define _NSIG 32 #define NSIG _NSIG #define SIGHUP 1 #define SIGINT 2 #define SIGQUIT 3 #define SIGILL 4 #define SIGTRAP 5 #define SIGABRT 6 #define SIGIOT 6 #define SIGBUS 7 #define SIGFPE 8 #define SIGKILL 9 #define SIGUSR1 10 #define SIGSEGV 11 #define SIGUSR2 12 #define SIGPIPE 13 #define SIGALRM 14 #define SIGTERM 15 #define SIGSTKFLT 16 #define SIGCHLD 17 #define SIGCONT 18 #define SIGSTOP 19 #define SIGTSTP 20 #define SIGTTIN 21 #define SIGTTOU 22 #define SIGURG 23 #define SIGXCPU 24 #define SIGXFSZ 25 #define SIGVTALRM 26 #define SIGPROF 27 #define SIGWINCH 28 #define SIGIO 29 #define SIGPOLL SIGIO /* #define SIGLOST 29 */ #define SIGPWR 30 #define SIGUNUSED 31 /* * sa_flags values: SA_STACK is not currently supported, but will allow the * usage of signal stacks by using the (now obsolete) sa_restorer field in * the sigaction structure as a stack pointer. This is now possible due to * the changes in signal handling. LBT 010493. * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the * SA_RESTART flag to get restarting signals (which were the default long ago) * SA_SHIRQ flag is for shared interrupt support on PCI and EISA. */ #define SA_NOCLDSTOP 1 #define SA_SHIRQ 0x04000000 #define SA_STACK 0x08000000 #define SA_RESTART 0x10000000 #define SA_INTERRUPT 0x20000000 #define SA_NOMASK 0x40000000 #define SA_ONESHOT 0x80000000 #ifdef __KERNEL__ /* * These values of sa_flags are used only by the kernel as part of the * irq handling routines. * * SA_INTERRUPT is also used by the irq handling routines. */ #define SA_PROBE SA_ONESHOT #define SA_SAMPLE_RANDOM SA_RESTART #endif #define SIG_BLOCK 0 /* for blocking signals */ #define SIG_UNBLOCK 1 /* for unblocking signals */ #define SIG_SETMASK 2 /* for setting the signal mask */ /* Type of a signal handler. */ typedef void (*__sighandler_t)(int); #define SIG_DFL ((__sighandler_t)0) /* default signal handling */ #define SIG_IGN ((__sighandler_t)1) /* ignore signal */ #define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ struct sigaction { __sighandler_t sa_handler; sigset_t sa_mask; unsigned long sa_flags; void (*sa_restorer)(void); }; #ifdef __KERNEL__ #include <asm/sigcontext.h> #endif #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-ppc/socket.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-ppc/socket.h?rev=1.1&content-type=text/x-cvsweb-markup Index: socket.h =================================================================== #ifndef _ASM_SOCKET_H #define _ASM_SOCKET_H /* Socket-level I/O control calls. */ #define FIOSETOWN 0x8901 #define SIOCSPGRP 0x8902 #define FIOGETOWN 0x8903 #define SIOCGPGRP 0x8904 #define SIOCATMARK 0x8905 #define SIOCGSTAMP 0x8906 /* Get stamp */ /* For sets