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From: cvs at opencores.org<cvs@o...>
Date: Tue Dec 20 12:28:06 CET 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/12 20:12:28

Added: or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110
a.out.h dma.h hardware.h io.h irq.h irqs.h mmap.h
mmu.h oldlatches.h processor.h serial.h shmparam.h
system.h time.h uncompress.h
Log:
First Import of RC20x uClinux


Revision Changes Path
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/a.out.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/a.out.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: a.out.h
===================================================================
/*
* linux/include/asm-arm/arch-ebsa/a.out.h
*
* Copyright (C) 1996 Russell King
*/

#ifndef __ASM_ARCH_A_OUT_H
#define __ASM_ARCH_A_OUT_H

#ifdef __KERNEL__
#define STACK_TOP ((current->personality==PER_LINUX_32BIT)? 0xc0000000 : 0x04000000)
#define LIBRARY_START_TEXT (0x00c00000)
#endif

#endif




1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/dma.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/dma.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: dma.h
===================================================================
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H

#define MAX_DMA_ADDRESS 0xffffffff

/*
* DMA modes - we have two, IN and OUT
*/
typedef enum {
DMA_MODE_READ,
DMA_MODE_WRITE
} dmamode_t;

#define MAX_DMA_CHANNELS 0

#endif /* _ASM_ARCH_DMA_H */




1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/hardware.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/hardware.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: hardware.h
===================================================================
/*
* linux/include/asm-arm/arch-ebsa/hardware.h
*
* Copyright (C) 1996 Russell King.
*
* This file contains the hardware definitions of the EBSA-110.
*/

#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H

#define IO_BASE 0xe0000000
#define IO_SIZE 0x20000000
#define IO_START 0xe0000000

#ifndef __ASSEMBLER__

/*
* IO definitions
*/
#define PIT_CTRL ((volatile unsigned char *)0xf200000d)
#define PIT_T2 ((volatile unsigned char *)0xf2000009)
#define PIT_T1 ((volatile unsigned char *)0xf2000005)
#define PIT_T0 ((volatile unsigned char *)0xf2000001)
#define PCIO_BASE 0xf0000000

/*
* RAM definitions
*/
#define MAPTOPHYS(a) ((unsigned long)(a) - PAGE_OFFSET)
#define KERNTOPHYS(a) ((unsigned long)(&a))
#define KERNEL_BASE (0xc0008000)

#else
#define PCIO_BASE 0xf0000000 #define IO_BASE 0 #endif #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/io.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/io.h?rev=1.1&content-type=text/x-cvsweb-markup Index: io.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/io.h * * Copyright (C) 1997 Russell King * * Modifications: * 06-Dec-1997 RMK Created. */ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H /* * This architecture does not require any delayed IO, and * has the constant-optimised IO */ #undef ARCH_IO_DELAY /* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ * and are translated to the start of IO. Note that all addresses are * shifted left! */ #define __PORT_PCIO(x) (!((x) & 0x80000000)) /* * Dynamic IO functions - let the compiler * optimize the expressions */ #define DECLARE_DYN_OUT(fnsuffix,instr) \ extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ { \ unsigned long temp; \ __asm__ __volatile__( \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ "str" ##instr## " %1, [%0, %2, lsl #2]" \ : "=&r" (temp) \ : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ } #define DECLARE_DYN_IN(sz,fnsuffix,instr) \ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ { \ unsigned long temp, value; \ __asm__ __volatile__( \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ "ldr" ##instr## " %1, [%0, %2, lsl #2]" \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ return (unsigned sz)value; \ } extern __inline__ unsigned int __ioaddr (unsigned int port) \ { \ if (__PORT_PCIO(port)) \ return (unsigned int)(PCIO_BASE + (port << 2)); \ else \ return (unsigned int)(IO_BASE + (port << 2)); \ } #define DECLARE_IO(sz,fnsuffix,instr) \ DECLARE_DYN_OUT(fnsuffix,instr) \ DECLARE_DYN_IN(sz,fnsuffix,instr) DECLARE_IO(char,b,"b") DECLARE_IO(short,w,"") DECLARE_IO(long,l,"") #undef DECLARE_IO #undef DECLARE_DYN_OUT #undef DECLARE_DYN_IN /* * Constant address IO functions * * These have to be macros for the 'J' constraint to work - * +/-4096 immediate operand. */ #define __outbc(value,port) \ ({ \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "strb %0, [%1, %2]" \ : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "strb %0, [%1, %2]" \ : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ }) #define __inbc(port) \ ({ \ unsigned char result; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "ldrb %0, [%1, %2]" \ : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "ldrb %0, [%1, %2]" \ : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ result; \ }) #define __outwc(value,port) \ ({ \ unsigned long v = value; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "str %0, [%1, %2]" \ : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "str %0, [%1, %2]" \ : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ }) #define __inwc(port) \ ({ \ unsigned short result; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "ldr %0, [%1, %2]" \ : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "ldr %0, [%1, %2]" \ : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ result & 0xffff; \ }) #define __outlc(v,p) __outwc((v),(p)) #define __inlc(port) \ ({ \ unsigned long result; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "ldr %0, [%1, %2]" \ : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "ldr %0, [%1, %2]" \ : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ result; \ }) #define __ioaddrc(port) \ ({ \ unsigned long addr; \ if (__PORT_PCIO((port))) \ addr = PCIO_BASE + ((port) << 2); \ else \ addr = IO_BASE + ((port) << 2); \ addr; \ }) /* * Translated address IO functions * * IO address has already been translated to a virtual address */ #define outb_t(v,p) \ (*(volatile unsigned char *)(p) = (v)) #define inb_t(p) \ (*(volatile unsigned char *)(p)) #define outl_t(v,p) \ (*(volatile unsigned long *)(p) = (v)) #define inl_t(p) \ (*(volatile unsigned long *)(p)) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/irq.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/irq.h?rev=1.1&content-type=text/x-cvsweb-markup Index: irq.h =================================================================== /* * include/asm-arm/arch-ebsa/irq.h * * Copyright (C) 1996 Russell King */ #define IRQ_MCLR ((volatile unsigned char *)0xf3000000) #define IRQ_MSET ((volatile unsigned char *)0xf2c00000) #define IRQ_MASK ((volatile unsigned char *)0xf2c00000) #define BUILD_IRQ(s,n,m) extern void IRQ_interrupt(void); extern void timer_IRQ_interrupt(void); extern void fast_IRQ_interrupt(void); extern void bad_IRQ_interrupt(void); extern void probe_IRQ_interrupt(void); #define IRQ_interrupt0 IRQ_interrupt #define IRQ_interrupt1 IRQ_interrupt #define IRQ_interrupt2 IRQ_interrupt #define IRQ_interrupt3 IRQ_interrupt #define IRQ_interrupt4 timer_IRQ_interrupt #define IRQ_interrupt5 IRQ_interrupt #define IRQ_interrupt6 IRQ_interrupt #define IRQ_interrupt7 IRQ_interrupt #define IRQ_interrupt8 IRQ_interrupt #define IRQ_interrupt9 IRQ_interrupt #define IRQ_interrupt10 IRQ_interrupt #define IRQ_interrupt11 IRQ_interrupt #define IRQ_interrupt12 IRQ_interrupt #define IRQ_interrupt13 IRQ_interrupt #define IRQ_interrupt14 IRQ_interrupt #define IRQ_interrupt15 IRQ_interrupt #define IRQ_interrupt16 IRQ_interrupt #define IRQ_interrupt17 IRQ_interrupt #define IRQ_interrupt18 IRQ_interrupt #define IRQ_interrupt19 IRQ_interrupt #define IRQ_interrupt20 IRQ_interrupt #define IRQ_interrupt21 IRQ_interrupt #define IRQ_interrupt22 IRQ_interrupt #define IRQ_interrupt23 IRQ_interrupt #define IRQ_INTERRUPT(n) IRQ_interrupt##n #define FAST_INTERRUPT(n) fast_IRQ_interrupt #define BAD_INTERRUPT(n) bad_IRQ_interrupt #define PROBE_INTERRUPT(n) probe_IRQ_interrupt static __inline__ void mask_irq(unsigned int irq) { if (irq < 8) *IRQ_MCLR = 1 << irq; } static __inline__ void unmask_irq(unsigned int irq) { if (irq < 8) *IRQ_MSET = 1 << irq; } static __inline__ unsigned long get_enabled_irqs(void) { return 0; } static __inline__ void irq_init_irq(void) { unsigned long flags; save_flags_cli (flags); *IRQ_MCLR = 0xff; *IRQ_MSET = 0x55; *IRQ_MSET = 0x00; if (*IRQ_MASK != 0x55) while (1); *IRQ_MCLR = 0xff; /* clear all interrupt enables */ restore_flags (flags); } 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/irqs.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/irqs.h?rev=1.1&content-type=text/x-cvsweb-markup Index: irqs.h =================================================================== /* * linux/include/asm-arm/arch-sa100eval/irqs.h * * Copyright (C) 1996 Russell King */ #define IRQ_PRINTER 0 #define IRQ_COM1 1 #define IRQ_COM2 2 #define IRQ_ETHERNET 3 #define IRQ_TIMER0 4 #define IRQ_TIMER1 5 #define IRQ_PCMCIA 6 #define IRQ_IMMEDIATE 7 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/mmap.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/mmap.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mmap.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/mmap.h * * Copyright (C) 1996 Russell King */ /* * Use SRAM for cache flushing */ #define SAFE_ADDR 0x40000000 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/mmu.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/mmu.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mmu.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/mmu.h * * Copyright (c) 1996 Russell King. * * Changelog: * 20-10-1996 RMK Created */ #ifndef __ASM_ARCH_MMU_H #define __ASM_ARCH_MMU_H /* * On ebsa, the dram is contiguous */ #define __virt_to_phys__is_a_macro #define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET) #define __phys_to_virt__is_a_macro #define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET) /* * Virtual view <-> DMA view memory address translations * virt_to_bus: Used to translate the virtual address to an * address suitable to be passed to set_dma_addr * bus_to_virt: Used to convert an address for DMA operations * to an address that the kernel can use. */ #define __virt_to_bus__is_a_macro #define __virt_to_bus(x) (x) #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) (x) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/oldlatches.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/oldlatches.h?rev=1.1&content-type=text/x-cvsweb-markup Index: oldlatches.h =================================================================== /* * Dummy oldlatches.h * * Copyright (C) 1996 Russell King */ #ifdef __need_oldlatches #error "Old latches not present in this (rpc) machine" #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/processor.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/processor.h?rev=1.1&content-type=text/x-cvsweb-markup Index: processor.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/processor.h * * Copyright (C) 1996 Russell King */ #ifndef __ASM_ARCH_PROCESSOR_H #define __ASM_ARCH_PROCESSOR_H /* * Bus types */ #define EISA_bus 0 #define EISA_bus__is_a_macro /* for versions in ksyms.c */ #define MCA_bus 0 #define MCA_bus__is_a_macro /* for versions in ksyms.c */ /* * User space: 3GB */ #define TASK_SIZE (0xc0000000UL) #define INIT_MMAP { &init_mm, 0xc0000000, 0xc2000000, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/serial.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/serial.h?rev=1.1&content-type=text/x-cvsweb-markup Index: serial.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/serial.h * * Copyright (c) 1996 Russell King. * * Changelog: * 15-10-1996 RMK Created */ #ifndef __ASM_ARCH_SERIAL_H #define __ASM_ARCH_SERIAL_H /* * This assumes you have a 1.8432 MHz clock for your UART. * * It'd be nice if someone built a serial card with a 24.576 MHz * clock, since the 16550A is capable of handling a top speed of 1.5 * megabits/second; but this requires the faster clock. */ #define BASE_BAUD (1843200 / 16) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) /* UART CLK PORT IRQ FLAGS */ #define RS_UARTS \ { 0, BASE_BAUD, 0x3F8, 1, STD_COM_FLAGS }, /* ttyS0 */ \ { 0, BASE_BAUD, 0x2F8, 2, STD_COM_FLAGS }, /* ttyS1 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS2 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS3 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS7 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS8 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS9 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS10 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS11 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS12 */ \ { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS13 */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/shmparam.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/shmparam.h?rev=1.1&content-type=text/x-cvsweb-markup Index: shmparam.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/shmparam.h * * Copyright (c) 1996 Russell King. */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/system.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/system.h?rev=1.1&content-type=text/x-cvsweb-markup Index: system.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/system.h * * Copyright (c) 1996 Russell King. */ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H extern __inline__ void arch_hard_reset (void) { /* * loop endlessly */ while (1); } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/time.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/time.h?rev=1.1&content-type=text/x-cvsweb-markup Index: time.h =================================================================== /* * linux/include/asm-arm/arch-a5k/time.h * * Copyright (c) 1996 Russell King. * * No real time clock on the evaluation board! * * Changelog: * 10-Oct-1996 RMK Created * 04-Dec-1997 RMK Updated for new arch/arm/time.c */ #define MCLK_47_8 #if defined(MCLK_42_3) #define PIT1_COUNT 0xecbe #elif defined(MCLK_47_8) /* * This should be 0x10AE1, but that doesn't exactly fit. * We run the timer interrupt at 5ms, and then divide it by * two in software... This is so that the user processes * see exactly the same model whichever ARM processor they're * running on. */ #define PIT1_COUNT 0x85b8 #define DIVISOR 2 #endif extern __inline__ unsigned long gettimeoffset (void) { return 0; } #ifndef DIVISOR extern __inline__ int reset_timer (void) { *PIT_T1 = (PIT1_COUNT) & 0xff; *PIT_T1 = (PIT1_COUNT) >> 8; return 1; } #else extern __inline__ int reset_timer (void) { static unsigned int divisor; static int count = 50; *PIT_T1 = (PIT1_COUNT) & 0xff; *PIT_T1 = (PIT1_COUNT) >> 8; if (--count == 0) { count = 50; *(volatile unsigned char *)0xf2400000 ^= 128; } if (divisor == 0) { divisor = DIVISOR - 1; return 1; } divisor -= 1; return 0; } #endif /* * We don't have a RTC to update! */ #define update_rtc() /* * Set up timer interrupt, and return the current time in seconds. */ extern __inline__ unsigned long setup_timer (void) { /* * Timer 1, mode 0, 16-bit, autoreload */ *PIT_CTRL = 0x70; /* * Refresh counter clocked at 47.8MHz/7 = 146.4ns * We want centi-second interrupts */ reset_timer (); /* * Default the date to 1 Jan 1970 0:0:0 * You will have to run a time daemon to set the * clock correctly at bootup */ return mktime(1970, 1, 1, 0, 0, 0); } 1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/uncompress.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-ebsa110/uncompress.h?rev=1.1&content-type=text/x-cvsweb-markup Index: uncompress.h =================================================================== /* * linux/include/asm-arm/arch-ebsa/uncompress.h * * Copyright (C) 1996 Russell King */ /* * This does not append a newline */ static void puts(const char *s) { __asm__ __volatile__(" ldrb %0, [%1], #1 teq %0, #0 beq 3f 1: strb %0, [%2] 2: ldrb %0, [%2, #0x14] and %0, %0, #0x60 teq %0, #0x60 bne 2b teq %0, #'\n' moveq %0, #'\r' beq 1b ldrb %0, [%1], #1 teq %0, #0 bne 1b 3: " : : "r" (0), "r" (s), "r" (0xf0000be0) : "cc"); } /* * nothing to do */ #define arch_decomp_setup()