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Message
From: cvs at opencores.org<cvs@o...>
Date: Mon Nov 28 19:41:31 CET 2005
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/05/11 28:19:41 Modified: jop/vhdl/top jopsc.vhd
Log:
Changed signal names to use the names from the specification.
Revision Changes Path
1.2 jop/vhdl/top/jopsc.vhd
http://www.opencores.org/cvsweb.shtml/jop/vhdl/top/jopsc.vhd.diff?r1=1.1&r2=1.2
(In the diff below, changes in quantity of whitespace are not shown.)
Index: jopsc.vhd
===================================================================
RCS file: /cvsroot/martin/jop/vhdl/top/jopsc.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- jopsc.vhd 24 Nov 2005 20:53:36 -0000 1.1
+++ jopsc.vhd 28 Nov 2005 18:41:30 -0000 1.2
@@ -247,11 +247,11 @@
signal jbc_addr : std_logic_vector(jpc_width-1 downto 0);
signal jbc_data : std_logic_vector(7 downto 0);
- signal sc_addr : std_logic_vector(17 downto 0);
+ signal sc_address : std_logic_vector(17 downto 0);
signal sc_wr_data : std_logic_vector(31 downto 0);
signal sc_rd, sc_wr : std_logic;
signal sc_rd_data : std_logic_vector(31 downto 0);
- signal sc_bsy_cnt : unsigned(1 downto 0);
+ signal sc_rdy_cnt : unsigned(1 downto 0);
-- memory interface
@@ -360,12 +360,12 @@
jbc_addr => jbc_addr,
jbc_data => jbc_data,
- addr => sc_addr,
+ address => sc_address,
wr_data => sc_wr_data,
rd => sc_rd,
wr => sc_wr,
rd_data => sc_rd_data,
- bsy_cnt => sc_bsy_cnt
+ rdy_cnt => sc_rdy_cnt
);
cmp_scm: entity work.sc_mem_if
@@ -378,12 +378,12 @@
clk => clk_int,
reset => int_res,
- addr => sc_addr,
+ address => sc_address,
wr_data => sc_wr_data,
rd => sc_rd,
wr => sc_wr,
rd_data => sc_rd_data,
- bsy_cnt => sc_bsy_cnt,
+ rdy_cnt => sc_rdy_cnt,
ram_addr => ram_addr,
ram_dout => ram_dout,
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