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From: cvs at opencores.org<cvs@o...>
Date: Thu Nov 24 21:54:51 CET 2005
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/05/11 24:21:54

Modified: jop/xilinx/s3sk jop.npl
Log:
New SimpCon memory interface with block cache (xs3_jbc).


Revision Changes Path
1.5 jop/xilinx/s3sk/jop.npl

http://www.opencores.org/cvsweb.shtml/jop/xilinx/s3sk/jop.npl.diff?r1=1.4&r2=1.5

(In the diff below, changes in quantity of whitespace are not shown.)

Index: jop.npl
===================================================================
RCS file: /cvsroot/martin/jop/xilinx/s3sk/jop.npl,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- jop.npl 26 Jul 2005 12:30:29 -0000 1.4
+++ jop.npl 24 Nov 2005 20:54:50 -0000 1.5
@@ -26,7 +26,10 @@
SOURCE ..\..\vhdl\core\bcfetch.vhd
SOURCE ..\..\vhdl\core\fetch.vhd
SOURCE ..\..\vhdl\core\shift.vhd
-SOURCE ..\..\vhdl\core\mem_xs3.vhd
+SOURCE ..\..\vhdl\core\cache.vhd
+SOURCE ..\..\vhdl\xilinx\xs3_jbc.vhd
+SOURCE ..\..\vhdl\memory\mem_sc.vhd
+SOURCE ..\..\vhdl\memory\sc_sram32.vhd
SOURCE ..\..\vhdl\core\stack.vhd
SOURCE ..\..\vhdl\core\mul.vhd
SOURCE ..\..\vhdl\core\core.vhd
@@ -38,7 +41,7 @@
SOURCE ..\..\vhdl\jtbl.vhd
SOURCE ..\..\vhdl\offtbl.vhd
SOURCE ..\..\vhdl\rom.vhd
-SOURCE ..\..\vhdl\core\xram.vhd
+SOURCE ..\..\vhdl\xilinx\xram.vhd
SOURCE ..\..\vhdl\xram_block.vhd
SOURCE ..\..\vhdl\top\jop_xs3.vhd
DEPASSOC jop jop.ucf