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Message
From: cvs at opencores.org<cvs@o...>
Date: Thu Nov 24 21:48:14 CET 2005
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/05/11 24:21:48 Modified: jop/vhdl/altera cyc_jbc.vhd
Log:
comment change
Revision Changes Path
1.2 jop/vhdl/altera/cyc_jbc.vhd
http://www.opencores.org/cvsweb.shtml/jop/vhdl/altera/cyc_jbc.vhd.diff?r1=1.1&r2=1.2
(In the diff below, changes in quantity of whitespace are not shown.)
Index: cyc_jbc.vhd
===================================================================
RCS file: /cvsroot/martin/jop/vhdl/altera/cyc_jbc.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- cyc_jbc.vhd 11 May 2005 16:54:54 -0000 1.1
+++ cyc_jbc.vhd 24 Nov 2005 20:48:14 -0000 1.2
@@ -11,7 +11,7 @@
-- Changes:
-- 2003-08-14 load start address with jpc_wr and do autoincrement
-- load 32 bit data and do the 4 byte writes serial
--- 2005-02-17 extrected again from mem32.vhd
+-- 2005-02-17 extracted again from mem32.vhd
-- 2005-05-03 address width is jpc_width
--
--
@@ -35,7 +35,7 @@
end jbc;
--
--- registered and delayed wraddress, wren
+-- registered wraddress, wren
-- registered din
-- registered rdaddress
-- unregistered dout
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