|
Message
From: cvs at opencores.org<cvs@o...>
Date: Tue Oct 18 08:55:52 CEST 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/10 18:08:55 Added: or1k/rc203soc/backend/xilinx rc200soc.ucf rc203soc.ucf
Log:
Added support for rc200 board by Jacob Bower
Revision Changes Path
1.1 or1k/rc203soc/backend/xilinx/rc200soc.ucf
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/backend/xilinx/rc200soc.ucf?rev=1.1&content-type=text/x-cvsweb-markup
Index: rc200soc.ucf
===================================================================
NET "clk" LOC = "E12" ; # This is connected to the 50MHz clock
NET "clk" TNM_NET = "clk";
TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50 %;
NET "jtag_tck" LOC = "N3" ;
NET "jtag_tdi" LOC = "T2" ;
NET "jtag_tdo" LOC = "R3" ;
NET "jtag_tms" LOC = "P4" ;
NET "jtag_tck" TNM_NET = "jtag_tck";
TIMESPEC "TS_jtag_tck" = PERIOD "jtag_tck" 30 ns HIGH 50 %;
NET "reset" LOC = "J5" ;
NET "sram_address[0]" LOC = "C21" ;
NET "sram_address[1]" LOC = "C22" ;
NET "sram_address[2]" LOC = "D21" ;
NET "sram_address[3]" LOC = "D22" ;
NET "sram_address[4]" LOC = "E21" ;
NET "sram_address[5]" LOC = "F21" ;
NET "sram_address[6]" LOC = "F22" ;
NET "sram_address[7]" LOC = "G21" ;
NET "sram_address[8]" LOC = "G22" ;
NET "sram_address[9]" LOC = "H21" ;
NET "sram_address[10]" LOC = "J21" ;
NET "sram_address[11]" LOC = "J22" ;
NET "sram_address[12]" LOC = "K21" ;
NET "sram_address[13]" LOC = "K22" ;
NET "sram_address[14]" LOC = "L22" ;
NET "sram_address[15]" LOC = "L21" ;
NET "sram_address[16]" LOC = "E19" ;
NET "sram_address[17]" LOC = "E20" ;
NET "sram_address[18]" LOC = "F19" ;
NET "sram_address[19]" LOC = "F20" ;
NET "sram_clk" LOC = "F12" ;
NET "sram_data[0]" LOC = "K20" ;
NET "sram_data[1]" LOC = "L19" ;
NET "sram_data[2]" LOC = "L20" ;
NET "sram_data[3]" LOC = "K18" ;
NET "sram_data[4]" LOC = "L18" ;
NET "sram_data[5]" LOC = "E18" ;
NET "sram_data[6]" LOC = "F18" ;
NET "sram_data[7]" LOC = "G18" ;
NET "sram_data[8]" LOC = "H18" ;
NET "sram_data[9]" LOC = "J18" ;
NET "sram_data[10]" LOC = "J17" ;
NET "sram_data[11]" LOC = "K17" ;
NET "sram_data[12]" LOC = "B12" ;
NET "sram_data[13]" LOC = "A13" ;
NET "sram_data[14]" LOC = "B13" ;
NET "sram_data[15]" LOC = "A14" ;
NET "sram_data[16]" LOC = "B14" ;
NET "sram_data[17]" LOC = "B15" ;
NET "sram_data[18]" LOC = "A16" ;
NET "sram_data[19]" LOC = "B16" ;
NET "sram_data[20]" LOC = "A17" ;
NET "sram_data[21]" LOC = "B17" ;
NET "sram_data[22]" LOC = "B18" ;
NET "sram_data[23]" LOC = "A19" ;
NET "sram_data[24]" LOC = "B19" ;
NET "sram_data[25]" LOC = "C12" ;
NET "sram_data[26]" LOC = "D12" ;
NET "sram_data[27]" LOC = "C13" ;
NET "sram_data[28]" LOC = "D13" ;
NET "sram_data[29]" LOC = "C14" ;
NET "sram_data[30]" LOC = "D14" ;
NET "sram_data[31]" LOC = "C15" ;
NET "sram_nBW[0]" LOC = "J20" ;
NET "sram_nBW[1]" LOC = "K19" ;
NET "sram_nBW[2]" LOC = "H20" ;
NET "sram_nBW[3]" LOC = "J19" ;
NET "sram_nCS" LOC = "G19" ;
NET "sram_nRW" LOC = "G20" ;
NET "uart_srx" LOC = "U20" ;
NET "uart_stx" LOC = "V20" ;
NET "eth_data[0]" LOC = "M21" ;
NET "eth_data[1]" LOC = "N22" ;
NET "eth_data[2]" LOC = "N21" ;
NET "eth_data[3]" LOC = "P22" ;
NET "eth_data[4]" LOC = "P21" ;
NET "eth_data[5]" LOC = "R21" ;
NET "eth_data[6]" LOC = "T22" ;
NET "eth_data[7]" LOC = "T21" ;
NET "eth_data[8]" LOC = "U22" ;
NET "eth_data[9]" LOC = "U21" ;
NET "eth_data[10]" LOC = "V21" ;
NET "eth_data[11]" LOC = "W22" ;
NET "eth_data[12]" LOC = "W21" ;
NET "eth_data[13]" LOC = "Y22" ;
NET "eth_data[14]" LOC = "Y21" ;
NET "eth_data[15]" LOC = "M17" ;
NET "eth_address[0]" LOC = "M18" ;
NET "eth_address[1]" LOC = "M20" ;
NET "eth_address[2]" LOC = "M19" ;
NET "eth_nBE[0]" LOC = "N20" ;
NET "eth_nBE[1]" LOC = "N19" ;
NET "eth_nWRITE" LOC = "P19" ;
NET "eth_nREAD" LOC = "P20" ;
NET "eth_reset" LOC = "T20" ;
1.1 or1k/rc203soc/backend/xilinx/rc203soc.ucf
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/backend/xilinx/rc203soc.ucf?rev=1.1&content-type=text/x-cvsweb-markup
Index: rc203soc.ucf
===================================================================
NET "clk" LOC = "E13" ;
NET "clk" TNM_NET = "clk";
TIMESPEC "TS_clk" = PERIOD "clk" 30 ns HIGH 50 %;
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "jtag_tck" LOC = "U3" ;
NET "jtag_tdi" LOC = "P7" ;
NET "jtag_tdo" LOC = "Y4" ;
NET "jtag_tms" LOC = "T8" ;
NET "reset" LOC = "L7" ;
NET "sram_address[0]" LOC = "E23" ;
NET "sram_address[10]" LOC = "L23" ;
NET "sram_address[11]" LOC = "L24" ;
NET "sram_address[12]" LOC = "M23" ;
NET "sram_address[13]" LOC = "M24" ;
NET "sram_address[14]" LOC = "N24" ;
NET "sram_address[15]" LOC = "N23" ;
NET "sram_address[16]" LOC = "G21" ;
NET "sram_address[17]" LOC = "G22" ;
NET "sram_address[18]" LOC = "H21" ;
NET "sram_address[19]" LOC = "H22" ;
NET "sram_address[1]" LOC = "E24" ;
NET "sram_address[2]" LOC = "F23" ;
NET "sram_address[3]" LOC = "F24" ;
NET "sram_address[4]" LOC = "G23" ;
NET "sram_address[5]" LOC = "H23" ;
NET "sram_address[6]" LOC = "H24" ;
NET "sram_address[7]" LOC = "J23" ;
NET "sram_address[8]" LOC = "J24" ;
NET "sram_address[9]" LOC = "K23" ;
NET "sram_clk" LOC = "H14" ;
NET "sram_data[0]" LOC = "M22" ;
NET "sram_data[10]" LOC = "L19" ;
NET "sram_data[11]" LOC = "M19" ;
NET "sram_data[12]" LOC = "D14" ;
NET "sram_data[13]" LOC = "C15" ;
NET "sram_data[14]" LOC = "D15" ;
NET "sram_data[15]" LOC = "C16" ;
NET "sram_data[16]" LOC = "D16" ;
NET "sram_data[17]" LOC = "D17" ;
NET "sram_data[18]" LOC = "C18" ;
NET "sram_data[19]" LOC = "D18" ;
NET "sram_data[1]" LOC = "N21" ;
NET "sram_data[20]" LOC = "C19" ;
NET "sram_data[21]" LOC = "D19" ;
NET "sram_data[22]" LOC = "D20" ;
NET "sram_data[23]" LOC = "C21" ;
NET "sram_data[24]" LOC = "D21" ;
NET "sram_data[25]" LOC = "E14" ;
NET "sram_data[26]" LOC = "F14" ;
NET "sram_data[27]" LOC = "E15" ;
NET "sram_data[28]" LOC = "F15" ;
NET "sram_data[29]" LOC = "E16" ;
NET "sram_data[2]" LOC = "N22" ;
NET "sram_data[30]" LOC = "F16" ;
NET "sram_data[31]" LOC = "E17" ;
NET "sram_data[3]" LOC = "M20" ;
NET "sram_data[4]" LOC = "N20" ;
NET "sram_data[5]" LOC = "G20" ;
NET "sram_data[6]" LOC = "H20" ;
NET "sram_data[7]" LOC = "J20" ;
NET "sram_data[8]" LOC = "K20" ;
NET "sram_data[9]" LOC = "L20" ;
NET "sram_nBW[0]" LOC = "L22" ;
NET "sram_nBW[1]" LOC = "M21" ;
NET "sram_nBW[2]" LOC = "K22" ;
NET "sram_nBW[3]" LOC = "L21" ;
NET "sram_nCS" LOC = "J21" ;
NET "sram_nRW" LOC = "J22" ;
NET "uart_srx" LOC = "W22" ;
NET "uart_stx" LOC = "Y22" ;
NET "eth_data[0]" LOC = "P23" ;
NET "eth_data[1]" LOC = "R24" ;
NET "eth_data[2]" LOC = "R23" ;
NET "eth_data[3]" LOC = "T24" ;
NET "eth_data[4]" LOC = "T23" ;
NET "eth_data[5]" LOC = "U23" ;
NET "eth_data[6]" LOC = "V24" ;
NET "eth_data[7]" LOC = "V23" ;
NET "eth_data[8]" LOC = "W24" ;
NET "eth_data[9]" LOC = "W23" ;
NET "eth_data[10]" LOC = "Y23" ;
NET "eth_data[11]" LOC = "AA24" ;
NET "eth_data[12]" LOC = "AA23" ;
NET "eth_data[13]" LOC = "AB24" ;
NET "eth_data[14]" LOC = "AB23" ;
NET "eth_data[15]" LOC = "P19" ;
NET "eth_address[0]" LOC = "P20" ;
NET "eth_address[1]" LOC = "P22" ;
NET "eth_address[2]" LOC = "P21" ;
NET "eth_nBE[0]" LOC = "R22" ;
NET "eth_nBE[1]" LOC = "R21" ;
NET "eth_nWRITE" LOC = "T21" ;
NET "eth_nREAD" LOC = "T22" ;
NET "eth_reset" LOC = "V22" ;
#PACE: Start of PACE Prohibit Constraints
#PACE: End of Constraints generated by PACE
|
Browse
