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Message
From: OpenCores CVS Agent<cvs@o...>
Date: Thu Jan 27 14:51:33 CET 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/01 27:14:51 Modified: or1k/or1ksim/cpu/or32 execute.c insnset.c
Log:
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes
Revision Changes Path
1.100 +10 -12 or1k/or1ksim/cpu/or32/execute.c
http://www.opencores.org/cvsweb.shtml/or1k/or1ksim/cpu/or32/execute.c.diff?r1=1.99&r2=1.100
(In the diff below, changes in quantity of whitespace are not shown.)
Index: execute.c
===================================================================
RCS file: /cvsroot/nogj/or1k/or1ksim/cpu/or32/execute.c,v
retrieving revision 1.99
retrieving revision 1.100
diff -u -b -r1.99 -r1.100
--- execute.c 27 Jan 2005 13:41:05 -0000 1.99
+++ execute.c 27 Jan 2005 13:51:22 -0000 1.100
@@ -34,7 +34,6 @@
#include "labels.h"
#include "parse.h"
#include "execute.h"
-#include "stats.h"
#include "except.h"
#include "sprs.h"
#include "sim-config.h"
@@ -43,7 +42,7 @@
#include "immu.h"
#include "dmmu.h"
#include "debug.h"
-#include "opcode/or32.h"
+#include "stats.h"
/* General purpose registers. */
machword reg[MAX_GPRS];
@@ -301,20 +300,22 @@
adddstats(icomplet[0].insn_index, current->insn_index, 1, check_depend());
/* Dynamic, functional units stats. */
- addfstats(icomplet[0].func_unit, current->func_unit, 1, check_depend());
+ addfstats(or32_opcodes[icomplet[0].insn_index].func_unit,
+ or32_opcodes[current->insn_index].func_unit, 1, check_depend());
/* Dynamic, single stats. */
addsstats(current->insn_index, 1);
}
if (config.cpu.superscalar) {
- if ((current->func_unit == it_branch) || (current->func_unit == it_jump))
+ if ((or32_opcodes[current->insn_index].func_unit == it_branch) ||
+ (or32_opcodes[current->insn_index].func_unit == it_jump))
runtime.sim.storecycles += 0;
- if (current->func_unit == it_store)
+ if (or32_opcodes[current->insn_index].func_unit == it_store)
runtime.sim.storecycles += 1;
- if (current->func_unit == it_load)
+ if (or32_opcodes[current->insn_index].func_unit == it_load)
runtime.sim.loadcycles += 1;
#if 0
if ((icomplet[0].func_unit == it_load) && check_depend())
@@ -322,8 +323,8 @@
#endif
/* Pseudo multiple issue benchmark */
- if ((multissue[current->func_unit] < 1) || (check_depend())
- || (issued_per_cycle < 1)) {
+ if ((multissue[or32_opcodes[current->insn_index].func_unit] < 1) ||
+ (check_depend()) || (issued_per_cycle < 1)) {
int i;
for (i = 0; i < 20; i++)
multissue[i] = 2;
@@ -344,7 +345,7 @@
multissue[it_store] = 2;
multissue[it_load] = 2;
}
- multissue[current->func_unit]--;
+ multissue[or32_opcodes[current->insn_index].func_unit]--;
issued_per_cycle--;
}
@@ -615,9 +616,6 @@
#else
void l_invalid () {
#endif
- /* It would be hard to handle this case for statistics; we skip it
- since it should not occur anyway:
- IFF (config.cpu.dependstats) current->func_unit = it_unknown; */
except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);
}
1.17 +0 -68 or1k/or1ksim/cpu/or32/insnset.c
http://www.opencores.org/cvsweb.shtml/or1k/or1ksim/cpu/or32/insnset.c.diff?r1=1.16&r2=1.17
(In the diff below, changes in quantity of whitespace are not shown.)
Index: insnset.c
===================================================================
RCS file: /cvsroot/nogj/or1k/or1ksim/cpu/or32/insnset.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -b -r1.16 -r1.17
--- insnset.c 27 Jan 2005 13:41:07 -0000 1.16
+++ insnset.c 27 Jan 2005 13:51:23 -0000 1.17
@@ -22,7 +22,6 @@
signed long temp1, temp2, temp3;
signed char temp4;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp2 = (signed long)PARAM2;
temp3 = (signed long)PARAM1;
temp1 = temp2 + temp3;
@@ -45,7 +44,6 @@
signed long temp1, temp2, temp3;
signed char temp4;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp2 = (signed long)PARAM2;
temp3 = (signed long)PARAM1;
temp1 = temp2 + temp3 + getsprbits(SPR_SR, SPR_SR_CY);
@@ -66,7 +64,6 @@
}
INSTRUCTION (l_sw) {
int old_cyc = 0;
- IFF (config.cpu.dependstats) current->func_unit = it_store;
IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
set_mem32(PARAM0, PARAM1, &breakpoint);
if (config.cpu.sbuf_len) {
@@ -77,7 +74,6 @@
}
INSTRUCTION (l_sb) {
int old_cyc = 0;
- IFF (config.cpu.dependstats) current->func_unit = it_store;
IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
set_mem8(PARAM0, PARAM1, &breakpoint);
if (config.cpu.sbuf_len) {
@@ -88,7 +84,6 @@
}
INSTRUCTION (l_sh) {
int old_cyc = 0;
- IFF (config.cpu.dependstats) current->func_unit = it_store;
IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
set_mem16(PARAM0, PARAM1, &breakpoint);
if (config.cpu.sbuf_len) {
@@ -99,7 +94,6 @@
}
INSTRUCTION (l_lwz) {
unsigned long val;
- IFF (config.cpu.dependstats) current->func_unit = it_load;
if (config.cpu.sbuf_len) sbuf_load ();
val = eval_mem32(PARAM1, &breakpoint);
/* If eval operand produced exception don't set anything */
@@ -108,7 +102,6 @@
}
INSTRUCTION (l_lbs) {
signed char val;
- IFF (config.cpu.dependstats) current->func_unit = it_load;
if (config.cpu.sbuf_len) sbuf_load ();
val = eval_mem8(PARAM1, &breakpoint);
/* If eval opreand produced exception don't set anything */
@@ -117,7 +110,6 @@
}
INSTRUCTION (l_lbz) {
unsigned char val;
- IFF (config.cpu.dependstats) current->func_unit = it_load;
if (config.cpu.sbuf_len) sbuf_load ();
val = eval_mem8(PARAM1, &breakpoint);
/* If eval opreand produced exception don't set anything */
@@ -126,7 +118,6 @@
}
INSTRUCTION (l_lhs) {
signed short val;
- IFF (config.cpu.dependstats) current->func_unit = it_load;
if (config.cpu.sbuf_len) sbuf_load ();
val = eval_mem16(PARAM1, &breakpoint);
/* If eval opreand produced exception don't set anything */
@@ -135,7 +126,6 @@
}
INSTRUCTION (l_lhz) {
unsigned short val;
- IFF (config.cpu.dependstats) current->func_unit = it_load;
if (config.cpu.sbuf_len) sbuf_load ();
val = eval_mem16(PARAM1, &breakpoint);
/* If eval opreand produced exception don't set anything */
@@ -143,12 +133,10 @@
SET_PARAM0(val);
}
INSTRUCTION (l_movhi) {
- IFF (config.cpu.dependstats) current->func_unit = it_movimm;
SET_PARAM0(PARAM1 << 16);
}
INSTRUCTION (l_and) {
unsigned long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp1 = PARAM1 & PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
@@ -159,21 +147,18 @@
}
INSTRUCTION (l_or) {
unsigned long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp1 = PARAM1 | PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
}
INSTRUCTION (l_xor) {
unsigned long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp1 = PARAM1 ^ PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
}
INSTRUCTION (l_sub) {
signed long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp1 = (signed long)PARAM1 - (signed long)PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
@@ -182,8 +167,6 @@
INSTRUCTION (l_mul) {
signed long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
-
temp1 = PARAM1 * PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
@@ -194,7 +177,6 @@
INSTRUCTION (l_div) {
signed long temp3, temp2, temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp3 = PARAM2;
temp2 = PARAM1;
if (temp3)
@@ -209,7 +191,6 @@
INSTRUCTION (l_divu) {
unsigned long temp3, temp2, temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
temp3 = PARAM2;
temp2 = PARAM1;
if (temp3)
@@ -225,8 +206,6 @@
INSTRUCTION (l_sll) {
unsigned long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_shift;
-
temp1 = PARAM1 << PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
@@ -234,7 +213,6 @@
}
INSTRUCTION (l_sra) {
signed long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_shift;
temp1 = (signed)PARAM1 >> PARAM2;
set_ov_flag (temp1);
@@ -243,7 +221,6 @@
}
INSTRUCTION (l_srl) {
unsigned long temp1;
- IFF (config.cpu.dependstats) current->func_unit = it_shift;
temp1 = PARAM1 >> PARAM2;
set_ov_flag (temp1);
SET_PARAM0(temp1);
@@ -252,7 +229,6 @@
INSTRUCTION (l_bf) {
if (config.bpb.enabled) {
int fwd = (PARAM0 >= pc) ? 1 : 0;
- IFF (config.cpu.dependstats) current->func_unit = it_branch;
or1k_mstats.bf[flag][fwd]++;
bpb_update(current->insn_addr, flag);
}
@@ -267,7 +243,6 @@
INSTRUCTION (l_bnf) {
if (config.bpb.enabled) {
int fwd = (PARAM0 >= pc) ? 1 : 0;
- IFF (config.cpu.dependstats) current->func_unit = it_branch;
or1k_mstats.bnf[!flag][fwd]++;
bpb_update(current->insn_addr, flag == 0);
}
@@ -281,13 +256,11 @@
}
INSTRUCTION (l_j) {
pcdelay = pc + (signed)PARAM0 * 4;
- IFF (config.cpu.dependstats) current->func_unit = it_jump;
next_delay_insn = 1;
}
INSTRUCTION (l_jal) {
pcdelay = pc + (signed)PARAM0 * 4;
- IFF (config.cpu.dependstats) current->func_unit = it_jump;
set_reg32(LINK_REGNO, pc + 8);
next_delay_insn = 1;
if (config.sim.profile) {
@@ -301,27 +274,23 @@
}
}
INSTRUCTION (l_jalr) {
- IFF (config.cpu.dependstats) current->func_unit = it_jump;
pcdelay = PARAM0;
set_reg32(LINK_REGNO, pc + 8);
next_delay_insn = 1;
}
INSTRUCTION (l_jr) {
- IFF (config.cpu.dependstats) current->func_unit = it_jump;
pcdelay = PARAM0;
next_delay_insn = 1;
if (config.sim.profile)
fprintf (runtime.sim.fprof, "-%08llX %08lX\n", runtime.sim.cycles, pcdelay);
}
INSTRUCTION (l_rfe) {
- IFF (config.cpu.dependstats) current->func_unit = it_exception;
pcnext = mfspr(SPR_EPCR_BASE);
mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
}
INSTRUCTION (l_nop) {
unsigned long stackaddr;
int k = PARAM0;
- IFF (config.cpu.dependstats) current->func_unit = it_nop;
switch (k) {
case NOP_NOP:
break;
@@ -360,88 +329,72 @@
}
}
INSTRUCTION (l_sfeq) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = PARAM0 == PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfne) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = PARAM0 != PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfgts) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (signed)PARAM0 > (signed)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfges) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (signed)PARAM0 >= (signed)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sflts) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (signed)PARAM0 < (signed)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfles) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (signed)PARAM0 <= (signed)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfgtu) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (unsigned)PARAM0 > (unsigned)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfgeu) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (unsigned)PARAM0 >= (unsigned)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfltu) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (unsigned)PARAM0 < (unsigned)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfleu) {
- IFF (config.cpu.dependstats) current->func_unit = it_compare;
flag = (unsigned)PARAM0 <= (unsigned)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_extbs) {
unsigned char x;
- IFF (config.cpu.dependstats) current->func_unit = it_move;
x = PARAM1;
SET_PARAM0((signed long)x);
}
INSTRUCTION (l_extbz) {
unsigned char x;
- IFF (config.cpu.dependstats) current->func_unit = it_move;
x = PARAM1;
SET_PARAM0((unsigned long)x);
}
INSTRUCTION (l_exths) {
unsigned short x;
- IFF (config.cpu.dependstats) current->func_unit = it_move;
x = PARAM1;
SET_PARAM0((signed long)x);
}
INSTRUCTION (l_exthz) {
unsigned short x;
- IFF (config.cpu.dependstats) current->func_unit = it_move;
x = PARAM1;
SET_PARAM0((unsigned long)x);
}
INSTRUCTION (l_extws) {
unsigned int x;
- IFF (config.cpu.dependstats) current->func_unit = it_move;
x = PARAM1;
SET_PARAM0((signed long)x);
}
INSTRUCTION (l_extwz) {
unsigned int x;
- IFF (config.cpu.dependstats) current->func_unit = it_move;
x = PARAM1;
SET_PARAM0((unsigned long)x);
}
@@ -453,7 +406,6 @@
fprintf(runtime.sim.fspr_log, "Write to SPR : [%08lX] <- [%08lX]\n", regno, value);
}
- IFF (config.cpu.dependstats) current->func_unit = it_move;
if (mfspr(SPR_SR) & SPR_SR_SM)
mtspr(regno, value);
else {
@@ -469,7 +421,6 @@
fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", regno, value);
}
- IFF (config.cpu.dependstats) current->func_unit = it_move;
if (mfspr(SPR_SR) & SPR_SR_SM)
SET_PARAM0(value);
else {
@@ -489,7 +440,6 @@
sprword lo, hi;
LONGEST l;
long x, y;
- IFF (config.cpu.dependstats) current->func_unit = it_mac;
lo = mfspr (SPR_MACLO);
hi = mfspr (SPR_MACHI);
x = PARAM0;
@@ -509,7 +459,6 @@
sprword lo, hi;
LONGEST l;
long x, y;
- IFF (config.cpu.dependstats) current->func_unit = it_mac;
lo = mfspr (SPR_MACLO);
hi = mfspr (SPR_MACHI);
x = PARAM0;
@@ -528,7 +477,6 @@
INSTRUCTION (l_macrc) {
sprword lo, hi;
LONGEST l;
- IFF (config.cpu.dependstats) current->func_unit = it_mac;
/* No need for synchronization here -- all MAC instructions are 1 cycle long. */
lo = mfspr (SPR_MACLO);
hi = mfspr (SPR_MACHI);
@@ -540,76 +488,60 @@
mtspr (SPR_MACHI, 0);
}
INSTRUCTION (l_cmov) {
- IFF (config.cpu.dependstats) current->func_unit = it_move;
SET_PARAM0(flag ? PARAM1 : PARAM2);
}
INSTRUCTION (l_ff1) {
- IFF (config.cpu.dependstats) current->func_unit = it_arith;
SET_PARAM0(ffs(PARAM1));
}
/******* Floating point instructions *******/
/* Single precision */
INSTRUCTION (lf_add_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
SET_PARAM0((machword)((float)PARAM1 + (float)PARAM2));
}
INSTRUCTION (lf_div_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
SET_PARAM0((machword)((float)PARAM1 / (float)PARAM2));
}
INSTRUCTION (lf_ftoi_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
// set_operand32(0, freg[get_operand(1)], &breakpoint);
}
INSTRUCTION (lf_itof_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
// freg[get_operand(0)] = eval_operand32(1, &breakpoint);
}
INSTRUCTION (lf_madd_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
SET_PARAM0((machword)((float)PARAM0 + (float)PARAM1 * (float)PARAM2));
}
INSTRUCTION (lf_mul_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
SET_PARAM0((machword)((float)PARAM1 * (float)PARAM2));
}
INSTRUCTION (lf_rem_s) {
float temp = (float)PARAM1 / (float)PARAM2;
- IFF (config.cpu.dependstats) current->func_unit = it_float;
SET_PARAM0(temp - (machword)temp);
}
INSTRUCTION (lf_sfeq_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
flag = (float)PARAM0 == (float)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (lf_sfge_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
flag = (float)PARAM0 >= (float)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (lf_sfgt_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
flag = (float)PARAM0 > (float)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (lf_sfle_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
flag = (float)PARAM0 <= (float)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (lf_sflt_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
flag = (float)PARAM0 < (float)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (lf_sfne_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
flag = (float)PARAM0 != (float)PARAM1;
setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (lf_sub_s) {
- IFF (config.cpu.dependstats) current->func_unit = it_float;
SET_PARAM0((machword)((float)PARAM1 - (float)PARAM2));
}
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