Message

Reply | Reply all

Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

From: OpenCores CVS Agent<cvs@o...>
Date: Thu Jan 20 14:49:02 CET 2005
Subject: [cvs-checkins] MODIFIED: usbhostslave ...
Date: 00/05/01 20:14:49

Modified: usbhostslave/RTL/slaveController USBSlaveControlBI.v
endpMux.v fifoMux.v sctxportarbiter.asf
sctxportarbiter.v slaveDirectcontrol.asf
slaveDirectcontrol.v slaveGetpacket.asf
slaveGetpacket.v slaveRxStatusMonitor.v
slaveSendpacket.asf slaveSendpacket.v
slavecontroller.asf slavecontroller.v
usbSlaveControl.v
Log:
Fixed bus turn-around problems, added version number


Revision Changes Path
1.3 +2 -9 usbhostslave/RTL/slaveController/USBSlaveControlBI.v

http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/USBSlaveControlBI.v.diff?r1=1.2&r2=1.3

(In the diff below, changes in quantity of whitespace are not shown.)

Index: USBSlaveControlBI.v
===================================================================
RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/USBSlaveControlBI.v,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- USBSlaveControlBI.v 18 Dec 2004 14:36:17 -0000 1.2
+++ USBSlaveControlBI.v 20 Jan 2005 13:47:56 -0000 1.3
@@ -41,18 +41,8 @@
//// ////
//////////////////////////////////////////////////////////////////////
//
-// $Id: USBSlaveControlBI.v,v 1.2 2004/12/18 14:36:17 sfielding Exp $
-//
-// CVS Revision History
-//
-// $Log: USBSlaveControlBI.v,v $
-// Revision 1.2 2004/12/18 14:36:17 sfielding
-// Removed html documentation
-//
-// Revision 1.1.1.1 2004/10/11 04:01:10 sfielding
-// Created
-//
-//
+`timescale 1ns / 1ps
+

`include "usbSlaveControl_h.v"




1.3 +1 -9 usbhostslave/RTL/slaveController/endpMux.v

http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/endpMux.v.diff?r1=1.2&r2=1.3

(In the diff below, changes in quantity of whitespace are not shown.)

Index: endpMux.v
===================================================================
RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/endpMux.v,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- endpMux.v 18 Dec 2004 14:36:18 -0000 1.2
+++ endpMux.v 20 Jan 2005 13:47:58 -0000 1.3
@@ -41,18 +41,7 @@
//// ////
//////////////////////////////////////////////////////////////////////
//
-// $Id: endpMux.v,v 1.2 2004/12/18 14:36:18 sfielding Exp $
-//
-// CVS Revision History
-//
-// $Log: endpMux.v,v $
-// Revision 1.2 2004/12/18 14:36:18 sfielding
-// Removed html documentation
-//
-// Revision 1.1.1.1 2004/10/11 04:01:05 sfielding
-// Created
-//
-//
+`timescale 1ns / 1ps

`include "usbSlaveControl_h.v"




1.3 +1 -9 usbhostslave/RTL/slaveController/fifoMux.v

http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/fifoMux.v.diff?r1=1.2&r2=1.3

(In the diff below, changes in quantity of whitespace are not shown.)

Index: fifoMux.v
===================================================================
RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/fifoMux.v,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- fifoMux.v 18 Dec 2004 14:36:20 -0000 1.2 +++ fifoMux.v 20 Jan 2005 13:47:59 -0000 1.3 @@ -41,18 +41,7 @@ //// //// ////////////////////////////////////////////////////////////////////// // -// $Id: fifoMux.v,v 1.2 2004/12/18 14:36:20 sfielding Exp $ -// -// CVS Revision History -// -// $Log: fifoMux.v,v $ -// Revision 1.2 2004/12/18 14:36:20 sfielding -// Removed html documentation -// -// Revision 1.1.1.1 2004/10/11 04:01:05 sfielding -// Created -// -// +`timescale 1ns / 1ps module fifoMux ( currEndP, 1.4 +1 -1 usbhostslave/RTL/slaveController/sctxportarbiter.asf http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/sctxportarbiter.asf.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: sctxportarbiter.asf =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/sctxportarbiter.asf,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- sctxportarbiter.asf 31 Dec 2004 14:40:44 -0000 1.3 +++ sctxportarbiter.asf 20 Jan 2005 13:48:01 -0000 1.4 @@ -6,7 +6,7 @@ ENTITY="SCTxPortArbiter" FRAMES=ON FREEOID=101 -"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// SCTxPortArbiter\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n// $Id: sctxportarbiter.asf,v 1.3 2004/12/31 14:40:44 sfielding Exp $\n//\n// CVS Revision History\n//\n// $Log$\n//\n`timescale 1ns / 1ps\n" +"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// SCTxPortArbiter\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`timescale 1ns / 1ps\n" END BUNDLES B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0 1.4 +0 -6 usbhostslave/RTL/slaveController/sctxportarbiter.v http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/sctxportarbiter.v.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: sctxportarbiter.v =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/sctxportarbiter.v,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- sctxportarbiter.v 31 Dec 2004 14:40:44 -0000 1.3 +++ sctxportarbiter.v 20 Jan 2005 13:48:02 -0000 1.4 @@ -42,15 +42,6 @@ //// //// ////////////////////////////////////////////////////////////////////// // -// $Id: sctxportarbiter.v,v 1.3 2004/12/31 14:40:44 sfielding Exp $ -// -// CVS Revision History -// -// $Log: sctxportarbiter.v,v $ -// Revision 1.3 2004/12/31 14:40:44 sfielding -// Fixed some blocking assignments, changed module name, fixed SOF_TX_TIME -// -// `timescale 1ns / 1ps module SCTxPortArbiter (clk, directCntlCntl, directCntlData, directCntlGnt, directCntlReq, directCntlWEn, rst, SCTxPortCntl, SCTxPortData, SCTxPortRdyIn, SCTxPortRdyOut, SCTxPortWEnable, sendPacketCntl, sendPacketData, sendPacketGnt, sendPacketReq, sendPacketWEn); 1.4 +71 -71 usbhostslave/RTL/slaveController/slaveDirectcontrol.asf http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveDirectcontrol.asf.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveDirectcontrol.asf =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveDirectcontrol.asf,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slaveDirectcontrol.asf 31 Dec 2004 14:40:44 -0000 1.3 +++ slaveDirectcontrol.asf 20 Jan 2005 13:48:03 -0000 1.4 @@ -6,7 +6,7 @@ ENTITY="slaveDirectControl" FRAMES=ON FREEOID=180 -"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveDirectControl\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n// $Id: slaveDirectcontrol.asf,v 1.3 2004/12/31 14:40:44 sfielding Exp $\n//\n// CVS Revision History\n//\n// $Log$\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n" +"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveDirectControl\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n" END BUNDLES B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0 @@ -43,91 +43,91 @@ GRIDSIZE 0,0 10000,10000 END OBJECTS -G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 97950,263700 1 0 0 "Module: slaveDirectControl" -A 5 0 1 TEXT "Actions" | 17700,253700 1 0 0 "// diagram ACTION" -F 6 0 671089152 16 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,233700 -L 7 6 0 TEXT "Labels" | 18700,230700 1 0 0 "slvDrctCntl" -L 8 9 0 TEXT "State Labels" | 100900,212200 1 0 0 "START_SDC\n/0/" -S 9 6 0 ELLIPSE "States" | 100900,212200 6500 6500 -L 10 11 0 TEXT "State Labels" | 102500,176200 1 0 0 "CHK_DRCT_CNTL\n/1/" -S 11 6 4096 ELLIPSE "States" | 102500,176200 6500 6500 -I 13 6 0 Builtin Reset | 48900,215400 -W 14 6 0 13 9 BEZIER "Transitions" | 48900,215400 60300,214600 83007,213291 94407,212491 L 15 16 0 TEXT "Labels" | 187300,263800 1 0 0 "clk" -I 16 0 3 Builtin InPort | 181300,263800 "" "" -L 17 18 0 TEXT "Labels" | 187500,257400 1 0 0 "rst" -I 18 0 2 Builtin InPort | 181500,257400 "" "" -C 19 14 0 TEXT "Conditions" | 76744,213569 1 0 0 "rst" -L 20 21 0 TEXT "Labels" | 63252,239123 1 0 0 "directControlEn" -I 21 0 2 Builtin InPort | 57252,239123 "" "" -W 26 6 0 9 11 BEZIER "Transitions" | 100525,205718 101125,199618 101292,188766 101892,182666 -W 27 6 8193 11 78 BEZIER "Transitions" | 99393,170493 94693,161093 75357,144887 70657,135487 +W 14 6 0 13 9 BEZIER "Transitions" | 48900,215400 60300,214600 83007,213291 94407,212491 +I 13 6 0 Builtin Reset | 48900,215400 +S 11 6 4096 ELLIPSE "States" | 102500,176200 6500 6500 +L 10 11 0 TEXT "State Labels" | 102500,176200 1 0 0 "CHK_DRCT_CNTL\n/1/" +S 9 6 0 ELLIPSE "States" | 100900,212200 6500 6500 +L 8 9 0 TEXT "State Labels" | 100900,212200 1 0 0 "START_SDC\n/0/" +L 7 6 0 TEXT "Labels" | 18700,230700 1 0 0 "slvDrctCntl" +F 6 0 671089152 16 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,233700 +A 5 0 1 TEXT "Actions" | 17700,253700 1 0 0 "// diagram ACTION" +G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 97950,263700 1 0 0 "Module: slaveDirectControl" C 28 27 0 TEXT "Conditions" | 80136,160617 1 0 0 "directControlEn == 1'b1" +W 27 6 8193 11 78 BEZIER "Transitions" | 99393,170493 94693,161093 75357,144887 70657,135487 +W 26 6 0 9 11 BEZIER "Transitions" | 100525,205718 101125,199618 101292,188766 101892,182666 +I 21 0 2 Builtin InPort | 57252,239123 "" "" +L 20 21 0 TEXT "Labels" | 63252,239123 1 0 0 "directControlEn" +C 19 14 0 TEXT "Conditions" | 76744,213569 1 0 0 "rst" +I 18 0 2 Builtin InPort | 181500,257400 "" "" +L 17 18 0 TEXT "Labels" | 187500,257400 1 0 0 "rst" +I 16 0 3 Builtin InPort | 181300,263800 "" "" W 51 6 8194 11 127 BEZIER "Transitions" | 108159,173005 122851,164817 139855,136277 144754,128309 -L 77 78 0 TEXT "State Labels" | 68590,129326 1 0 0 "DRCT_CNTL" -S 78 6 8196 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 68590,129326 6500 6500 H 79 78 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700 -W 88 79 4096 124 90 BEZIER "Transitions" | 105569,175900 100869,166500 70569,161175 65869,151775 -S 90 79 12288 ELLIPSE "States" | 62621,146145 6500 6500 -L 91 90 0 TEXT "State Labels" | 62621,146145 1 0 0 "WAIT_GNT\n/2/" +S 78 6 8196 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 68590,129326 6500 6500 +L 77 78 0 TEXT "State Labels" | 68590,129326 1 0 0 "DRCT_CNTL" +W 95 79 0 102 93 BEZIER "Transitions" | 65496,102474 65896,97574 67230,81067 67630,76167 +A 94 93 4 TEXT "Actions" | 87021,72145 1 0 0 "SCTxPortWEn <= 1'b0;" +S 93 79 16384 ELLIPSE "States" | 68621,69745 6500 6500 W 92 79 8194 93 102 BEZIER "Transitions" | 62907,72842 59107,76242 50421,81945 48421,85645\ 46421,89345 46021,97345 47471,100295 48921,103245\ 55748,105011 58848,106911 -S 93 79 16384 ELLIPSE "States" | 68621,69745 6500 6500 -A 94 93 4 TEXT "Actions" | 87021,72145 1 0 0 "SCTxPortWEn <= 1'b0;" -W 95 79 0 102 93 BEZIER "Transitions" | 65496,102474 65896,97574 67230,81067 67630,76167 -A 96 95 16 TEXT "Actions" | 62372,93902 1 0 0 "SCTxPortWEn <= 1'b1; \nSCTxPortData <= {6'b000000, directControlLineState}; \nSCTxPortCntl <= `TX_DIRECT_CONTROL;" -C 97 95 0 TEXT "Conditions" | 67437,101104 1 0 0 "SCTxPortRdy == 1'b1" -L 98 93 0 TEXT "State Labels" | 68621,69745 1 0 0 "CHK_LOOP\n/3/" -W 99 79 0 90 102 BEZIER "Transitions" | 62834,139649 63234,133449 64005,121613 64405,115413 -C 100 99 0 TEXT "Conditions" | 62221,136545 1 0 0 "SCTxPortGnt == 1'b1" -S 102 79 20480 ELLIPSE "States" | 65021,108945 6500 6500 +L 91 90 0 TEXT "State Labels" | 62621,146145 1 0 0 "WAIT_GNT\n/2/" +S 90 79 12288 ELLIPSE "States" | 62621,146145 6500 6500 +W 88 79 4096 124 90 BEZIER "Transitions" | 105569,175900 100869,166500 70569,161175 65869,151775 L 103 102 0 TEXT "State Labels" | 65021,108945 1 0 0 "WAIT_RDY\n/4/" -I 122 79 0 Builtin Exit | 138103,36586 -I 124 79 0 Builtin Entry | 109800,175900 +S 102 79 20480 ELLIPSE "States" | 65021,108945 6500 6500 +C 100 99 0 TEXT "Conditions" | 62221,136545 1 0 0 "SCTxPortGnt == 1'b1" +W 99 79 0 90 102 BEZIER "Transitions" | 62834,139649 63234,133449 64005,121613 64405,115413 +L 98 93 0 TEXT "State Labels" | 68621,69745 1 0 0 "CHK_LOOP\n/3/" +C 97 95 0 TEXT "Conditions" | 67437,101104 1 0 0 "SCTxPortRdy == 1'b1" +A 96 95 16 TEXT "Actions" | 62372,93902 1 0 0 "SCTxPortWEn <= 1'b1; \nSCTxPortData <= {6'b000000, directControlLineState}; \nSCTxPortCntl <= `TX_DIRECT_CONTROL;" +S 127 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 147819,122579 6500 6500 +L 126 127 0 TEXT "State Labels" | 147819,122579 1 0 0 "IDLE" W 125 6 0 78 11 BEZIER "Transitions" | 62548,131721 58511,135864 49941,141807 48613,147491\ 47285,153175 50048,167625 56316,171290 62585,174956\ 84856,175714 96012,175820 -L 126 127 0 TEXT "State Labels" | 147819,122579 1 0 0 "IDLE" -S 127 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 147819,122579 6500 6500 -H 128 127 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700 -W 135 128 0 143 146 BEZIER "Transitions" | 110317,146150 110717,139950 111488,128114 111888,121914 -C 136 135 0 TEXT "Conditions" | 109704,143046 1 0 0 "SCTxPortGnt == 1'b1" -S 137 128 28672 ELLIPSE "States" | 115898,76040 6500 6500 -L 138 137 0 TEXT "State Labels" | 115898,76040 1 0 0 "FIN\n/5/" -W 139 128 0 146 137 BEZIER "Transitions" | 112979,108975 113379,104075 114551,87365 114951,82465 -C 140 139 0 TEXT "Conditions" | 114907,107589 1 0 0 "SCTxPortRdy == 1'b1" -A 141 139 16 TEXT "Actions" | 109766,100293 1 0 0 "SCTxPortWEn <= 1'b1; \nSCTxPortData <= 8'h00; \nSCTxPortCntl <= `TX_IDLE;" -A 142 137 4 TEXT "Actions" | 130303,68109 1 0 0 "SCTxPortWEn <= 1'b0;\nSCTxPortReq <= 1'b0;" +I 124 79 0 Builtin Entry | 109800,175900 +I 122 79 0 Builtin Exit | 138103,36586 S 143 128 32768 ELLIPSE "States" | 110104,152646 6500 6500 -L 144 143 0 TEXT "State Labels" | 110104,152646 1 0 0 "WAIT_GNT\n/6/" -W 145 128 4096 150 143 BEZIER "Transitions" | 71299,204814 85991,196626 102015,166277 106914,158309 -S 146 128 36864 ELLIPSE "States" | 112504,115446 6500 6500 -L 147 146 0 TEXT "State Labels" | 112504,115446 1 0 0 "WAIT_RDY\n/7/" -A 148 145 16 TEXT "Actions" | 91825,176461 1 0 0 "SCTxPortReq <= 1'b1;" -I 150 128 0 Builtin Entry | 67068,204814 -I 151 128 0 Builtin Exit | 67380,61048 +A 142 137 4 TEXT "Actions" | 130303,68109 1 0 0 "SCTxPortWEn <= 1'b0;\nSCTxPortReq <= 1'b0;" +A 141 139 16 TEXT "Actions" | 109766,100293 1 0 0 "SCTxPortWEn <= 1'b1; \nSCTxPortData <= 8'h00; \nSCTxPortCntl <= `TX_IDLE;" +C 140 139 0 TEXT "Conditions" | 114907,107589 1 0 0 "SCTxPortRdy == 1'b1" +W 139 128 0 146 137 BEZIER "Transitions" | 112979,108975 113379,104075 114551,87365 114951,82465 +L 138 137 0 TEXT "State Labels" | 115898,76040 1 0 0 "FIN\n/5/" +S 137 128 28672 ELLIPSE "States" | 115898,76040 6500 6500 +C 136 135 0 TEXT "Conditions" | 109704,143046 1 0 0 "SCTxPortGnt == 1'b1" +W 135 128 0 143 146 BEZIER "Transitions" | 110317,146150 110717,139950 111488,128114 111888,121914 +H 128 127 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700 +L 159 158 0 TEXT "Labels" | 115163,245109 1 0 0 "SCTxPortWEn" +I 158 0 2 Builtin OutPort | 109163,245109 "" "" +L 157 156 0 TEXT "Labels" | 115440,251139 1 0 0 "SCTxPortData[7:0]" +I 156 0 130 Builtin OutPort | 109440,251139 "" "" +L 155 154 0 TEXT "Labels" | 114837,257571 1 0 0 "SCTxPortCntl[7:0]" +I 154 0 130 Builtin OutPort | 108837,257571 "" "" W 153 6 0 127 11 BEZIER "Transitions" | 152988,126518 159136,134574 171720,147536 171773,153843\ 171826,160150 159742,169266 150997,171704 142252,174142\ 120424,175336 108976,175654 -I 154 0 130 Builtin OutPort | 108837,257571 "" "" -L 155 154 0 TEXT "Labels" | 114837,257571 1 0 0 "SCTxPortCntl[7:0]" -I 156 0 130 Builtin OutPort | 109440,251139 "" "" -L 157 156 0 TEXT "Labels" | 115440,251139 1 0 0 "SCTxPortData[7:0]" -I 158 0 2 Builtin OutPort | 109163,245109 "" "" -L 159 158 0 TEXT "Labels" | 115163,245109 1 0 0 "SCTxPortWEn" -C 175 174 0 TEXT "Conditions" | 95181,61437 1 0 0 "directControlEn == 1'b0" -W 174 79 8193 93 122 BEZIER "Transitions" | 74339,66657 90586,60011 118717,43232 134964,36586 -I 160 0 2 Builtin InPort | 111543,239893 "" "" -L 161 160 0 TEXT "Labels" | 117543,239893 1 0 0 "SCTxPortRdy" -I 162 0 2 Builtin InPort | 162999,244717 "" "" -L 163 162 0 TEXT "Labels" | 168999,244717 1 0 0 "SCTxPortGnt" -I 164 0 2 Builtin OutPort | 160587,239893 "" "" -L 165 164 0 TEXT "Labels" | 166587,239893 1 0 0 "SCTxPortReq" -A 166 9 2 TEXT "Actions" | 121708,221292 1 0 0 "SCTxPortCntl <= 8'h00;\nSCTxPortData <= 8'h00;\nSCTxPortWEn <= 1'b0; \nSCTxPortReq <= 1'b0;" -A 167 88 16 TEXT "Actions" | 75140,165538 1 0 0 "SCTxPortReq <= 1'b1;" +I 151 128 0 Builtin Exit | 67380,61048 +I 150 128 0 Builtin Entry | 67068,204814 +A 148 145 16 TEXT "Actions" | 91825,176461 1 0 0 "SCTxPortReq <= 1'b1;" +L 147 146 0 TEXT "State Labels" | 112504,115446 1 0 0 "WAIT_RDY\n/7/" +S 146 128 36864 ELLIPSE "States" | 112504,115446 6500 6500 +W 145 128 4096 150 143 BEZIER "Transitions" | 71299,204814 85991,196626 102015,166277 106914,158309 +L 144 143 0 TEXT "State Labels" | 110104,152646 1 0 0 "WAIT_GNT\n/6/" W 173 128 0 137 151 BEZIER "Transitions" | 109732,73984 99784,70853 80467,64179 70519,61048 -I 179 0 130 Builtin InPort | 57352,247790 "" "" -L 178 179 0 TEXT "Labels" | 63352,247790 1 0 0 "directControlLineState[1:0]" +A 167 88 16 TEXT "Actions" | 75140,165538 1 0 0 "SCTxPortReq <= 1'b1;" +A 166 9 2 TEXT "Actions" | 121708,221292 1 0 0 "SCTxPortCntl <= 8'h00;\nSCTxPortData <= 8'h00;\nSCTxPortWEn <= 1'b0; \nSCTxPortReq <= 1'b0;" +L 165 164 0 TEXT "Labels" | 166587,239893 1 0 0 "SCTxPortReq" +I 164 0 2 Builtin OutPort | 160587,239893 "" "" +L 163 162 0 TEXT "Labels" | 168999,244717 1 0 0 "SCTxPortGnt" +I 162 0 2 Builtin InPort | 162999,244717 "" "" +L 161 160 0 TEXT "Labels" | 117543,239893 1 0 0 "SCTxPortRdy" +I 160 0 2 Builtin InPort | 111543,239893 "" "" +W 174 79 8193 93 122 BEZIER "Transitions" | 74339,66657 90586,60011 118717,43232 134964,36586 +C 175 174 0 TEXT "Conditions" | 95181,61437 1 0 0 "directControlEn == 1'b0" A 177 174 16 TEXT "Actions" | 102262,47300 1 0 0 "SCTxPortReq <= 1'b0;" +L 178 179 0 TEXT "Labels" | 63352,247790 1 0 0 "directControlLineState[1:0]" +I 179 0 130 Builtin InPort | 57352,247790 "" "" END 1.4 +0 -5 usbhostslave/RTL/slaveController/slaveDirectcontrol.v http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveDirectcontrol.v.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveDirectcontrol.v =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveDirectcontrol.v,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slaveDirectcontrol.v 31 Dec 2004 14:40:44 -0000 1.3 +++ slaveDirectcontrol.v 20 Jan 2005 13:48:04 -0000 1.4 @@ -42,14 +42,6 @@ //// //// ////////////////////////////////////////////////////////////////////// // -// $Id: slaveDirectcontrol.v,v 1.3 2004/12/31 14:40:44 sfielding Exp $ -// -// CVS Revision History -// -// $Log: slaveDirectcontrol.v,v $ -// Revision 1.3 2004/12/31 14:40:44 sfielding -// Fixed some blocking assignments, changed module name, fixed SOF_TX_TIME -// // `timescale 1ns / 1ps `include "usbSerialInterfaceEngine_h.v" 1.4 +5 -3 usbhostslave/RTL/slaveController/slaveGetpacket.asf http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveGetpacket.asf.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveGetpacket.asf =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveGetpacket.asf,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slaveGetpacket.asf 31 Dec 2004 14:40:44 -0000 1.3 +++ slaveGetpacket.asf 20 Jan 2005 13:48:05 -0000 1.4 @@ -5,8 +5,8 @@ LANGUAGE=VERILOG ENTITY="slaveGetPacket" FRAMES=ON -FREEOID=280 -"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveGetPacket\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n// $Id: slaveGetpacket.asf,v 1.3 2004/12/31 14:40:44 sfielding Exp $\n//\n// CVS Revision History\n//\n// $Log$\n//\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n" +FREEOID=284 +"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveGetPacket\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n" END BUNDLES B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0 @@ -61,7 +61,6 @@ GRIDSIZE 0,0 10000,10000 END OBJECTS -G 275 6 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 81060,118960 1 0 0 "//temp removal of time out\nSIERxTimeOut == 1'b1\nRXTimeOut <= 1'b1;" G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 97950,263700 1 0 0 "Module: slaveGetPacket" F 6 0 671089152 185 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15236 200200,215950 L 7 6 0 TEXT "Labels" | 19389,212093 1 0 0 "slvGetPkt" @@ -75,6 +74,9 @@ S 278 120 90112 ELLIPSE "States" | 44712,168924 6500 6500 W 279 120 0 278 137 BEZIER "Transitions" | 45244,175402 46602,184714 48694,202964 53786,209657\ 58879,216350 75631,224113 84458,228187 +W 281 6 0 11 40 BEZIER "Transitions" | 103032,141659 103834,114294 105382,61467 106184,34102 +C 282 281 0 TEXT "Conditions" | 78641,126629 1 0 0 "SIERxTimeOut == 1'b1" +A 283 281 16 TEXT "Actions" | 79925,116036 1 0 0 "RXTimeOut <= 1'b1;" W 18 6 0 11 15 BEZIER "Transitions" | 107724,143520 114924,137020 128014,124286 135214,117786 C 20 18 0 TEXT "Conditions" | 110328,141940 1 0 0 "RXDataValid == 1'b1" L 22 23 0 TEXT "State Labels" | 103550,184536 1 0 0 "WAIT_EN\n/15/" 1.4 +7 -7 usbhostslave/RTL/slaveController/slaveGetpacket.v http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveGetpacket.v.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveGetpacket.v =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveGetpacket.v,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slaveGetpacket.v 31 Dec 2004 14:40:44 -0000 1.3 +++ slaveGetpacket.v 20 Jan 2005 13:48:07 -0000 1.4 @@ -42,15 +42,7 @@ //// //// ////////////////////////////////////////////////////////////////////// // -// $Id: slaveGetpacket.v,v 1.3 2004/12/31 14:40:44 sfielding Exp $ -// -// CVS Revision History -// -// $Log: slaveGetpacket.v,v $ -// Revision 1.3 2004/12/31 14:40:44 sfielding -// Fixed some blocking assignments, changed module name, fixed SOF_TX_TIME -// -// +`timescale 1ns / 1ps `include "usbSerialInterfaceEngine_h.v" `include "usbConstants_h.v" @@ -126,7 +118,7 @@ // Machine: slvGetPkt // NextState logic (combinatorial) -always @ (RXByte or RXDataValid or RXDataIn or RXStreamStatusIn or RXStreamStatus or RXFifoFull or RXByteOldest or RXByteOld or getPacketEn or RXOverflow or ACKRxed or CRCError or bitStuffError or dataSequence or RXFifoWEn or RXFifoData or RXPacketRdy or RXTimeOut or RxPID or CurrState_slvGetPkt) +always @ (RXByte or RXDataValid or RXDataIn or RXStreamStatusIn or RXStreamStatus or RXFifoFull or RXByteOldest or RXByteOld or SIERxTimeOut or getPacketEn or RXOverflow or ACKRxed or CRCError or bitStuffError or dataSequence or RXFifoWEn or RXFifoData or RXPacketRdy or RXTimeOut or RxPID or CurrState_slvGetPkt) begin NextState_slvGetPkt <= CurrState_slvGetPkt; // Set default values for outputs and signals @@ -163,6 +155,11 @@ next_RXByte <= RXDataIn; next_RXStreamStatus <= RXStreamStatusIn; end + else if (SIERxTimeOut == 1'b1) + begin + NextState_slvGetPkt <= `PKT_RDY; + next_RXTimeOut <= 1'b1; + end end `CHK_PKT_START: begin 1.3 +1 -9 usbhostslave/RTL/slaveController/slaveRxStatusMonitor.v http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveRxStatusMonitor.v.diff?r1=1.2&r2=1.3 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveRxStatusMonitor.v =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveRxStatusMonitor.v,v retrieving revision 1.2 retrieving revision 1.3 diff -u -b -r1.2 -r1.3 --- slaveRxStatusMonitor.v 18 Dec 2004 14:36:20 -0000 1.2 +++ slaveRxStatusMonitor.v 20 Jan 2005 13:48:07 -0000 1.3 @@ -41,18 +41,7 @@ //// //// ////////////////////////////////////////////////////////////////////// // -// $Id: slaveRxStatusMonitor.v,v 1.2 2004/12/18 14:36:20 sfielding Exp $ -// -// CVS Revision History -// -// $Log: slaveRxStatusMonitor.v,v $ -// Revision 1.2 2004/12/18 14:36:20 sfielding -// Removed html documentation -// -// Revision 1.1.1.1 2004/10/11 04:01:09 sfielding -// Created -// -// +`timescale 1ns / 1ps module slaveRxStatusMonitor(connectStateIn, connectStateOut, resumeDetectedIn, resetEventOut, resumeIntOut, clk, rst); 1.4 +103 -103 usbhostslave/RTL/slaveController/slaveSendpacket.asf http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveSendpacket.asf.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveSendpacket.asf =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveSendpacket.asf,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slaveSendpacket.asf 31 Dec 2004 14:40:44 -0000 1.3 +++ slaveSendpacket.asf 20 Jan 2005 13:48:07 -0000 1.4 @@ -6,7 +6,7 @@ ENTITY="slaveSendPacket" FRAMES=ON FREEOID=215 -"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveSendPacket\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n// $Id: slaveSendpacket.asf,v 1.3 2004/12/31 14:40:44 sfielding Exp $\n//\n// CVS Revision History\n//\n// $Log$\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n" +"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveSendPacket\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n" END BUNDLES B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0 @@ -43,129 +43,129 @@ GRIDSIZE 0,0 10000,10000 END OBJECTS -S 11 6 4096 ELLIPSE "States" | 110774,159341 6500 6500 -L 10 11 0 TEXT "State Labels" | 110774,159341 1 0 0 "SP_WAIT_ENABLE\n/1/" -S 9 6 0 ELLIPSE "States" | 108917,188434 6500 6500 -L 8 9 0 TEXT "State Labels" | 108917,188434 1 0 0 "START_SP1\n/0/" -L 7 6 0 TEXT "Labels" | 32660,203132 1 0 0 "slvSndPkt" -F 6 0 671089152 188 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,208064 -A 5 0 1 TEXT "Actions" | 29672,248644 1 0 0 "always @(PID)\nbegin\n PIDNotPID <= { (PID ^ 4'hf), PID };\nend" -G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 110650,251000 1 0 0 "Module: slaveSendPacket" -I 12 6 0 Builtin Reset | 74872,202290 -W 13 6 0 12 9 BEZIER "Transitions" | 74872,202290 82145,199755 95857,193927 103130,191392 -W 14 6 0 9 11 BEZIER "Transitions" | 108829,181945 109138,177774 109593,169949 109902,165778 L 15 16 0 TEXT "State Labels" | 112482,123658 1 0 0 "SP1_WAIT_GNT\n/2/" -S 16 6 8192 ELLIPSE "States" | 112482,123658 6500 6500 -W 17 6 0 11 16 BEZIER "Transitions" | 110929,152860 111315,148225 111934,134981 112152,130145 -C 18 17 0 TEXT "Conditions" | 111903,152311 1 0 0 "sendPacketWEn == 1'b1" -A 19 17 16 TEXT "Actions" | 106114,144280 1 0 0 "sendPacketRdy <= 1'b0;\nSCTxPortReq <= 1'b1;" -L 20 21 0 TEXT "State Labels" | 113767,93734 1 0 0 "SP_SEND_PID" -S 21 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 113767,93734 6500 6500 -W 22 6 0 16 21 BEZIER "Transitions" | 112482,117158 112791,112755 112951,104607 113260,100204 -C 23 22 0 TEXT "Conditions" | 114630,116691 1 0 0 "SCTxPortGnt == 1'b1" -H 25 21 0 RECT 0,0,0 0 0 1 255,255,255 0 | 29624,2084 214124,250084 -S 26 25 16384 ELLIPSE "States" | 72734,192072 6500 6500 -L 27 26 0 TEXT "State Labels" | 72734,192775 1 0 0 "WAIT_RDY\n/3/" -I 28 25 0 Builtin Entry | 49237,230379 -I 29 25 0 Builtin Exit | 146004,95604 +W 14 6 0 9 11 BEZIER "Transitions" | 108829,181945 109138,177774 109593,169949 109902,165778 +W 13 6 0 12 9 BEZIER "Transitions" | 74872,202290 82145,199755 95857,193927 103130,191392 +I 12 6 0 Builtin Reset | 74872,202290 +G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 110650,251000 1 0 0 "Module: slaveSendPacket" +A 5 0 1 TEXT "Actions" | 29672,248644 1 0 0 "always @(PID)\nbegin\n PIDNotPID <= { (PID ^ 4'hf), PID };\nend" +F 6 0 671089152 188 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,208064 +L 7 6 0 TEXT "Labels" | 32660,203132 1 0 0 "slvSndPkt" +L 8 9 0 TEXT "State Labels" | 108917,188434 1 0 0 "START_SP1\n/0/" +S 9 6 0 ELLIPSE "States" | 108917,188434 6500 6500 +L 10 11 0 TEXT "State Labels" | 110774,159341 1 0 0 "SP_WAIT_ENABLE\n/1/" +S 11 6 4096 ELLIPSE "States" | 110774,159341 6500 6500 W 30 25 0 28 26 BEZIER "Transitions" | 53779,230379 60054,220138 63123,209223 69341,197615 -L 32 33 0 TEXT "State Labels" | 75021,153035 1 0 0 "FIN\n/4/" -S 33 25 20480 ELLIPSE "States" | 75021,153035 6500 6500 -W 34 25 0 26 33 BEZIER "Transitions" | 72953,185597 73302,178879 73960,166205 74309,159487 -C 36 34 0 TEXT "Conditions" | 75236,185214 1 0 0 "SCTxPortRdy == 1'b1" -A 37 34 16 TEXT "Actions" | 67602,177580 1 0 0 "SCTxPortWEn <= 1'b1;\nSCTxPortData <= PIDNotPID;\nSCTxPortCntl <= `TX_PACKET_START;" -A 38 33 4 TEXT "Actions" | 93627,154331 1 0 0 "SCTxPortWEn <= 1'b0;" -W 39 25 0 33 29 BEZIER "Transitions" | 79375,148210 95944,135371 126275,108443 142844,95604 -L 44 45 0 TEXT "State Labels" | 182202,45960 1 0 0 "SP_D0_D1" -S 45 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 182202,45960 6500 6500 -L 46 47 0 TEXT "State Labels" | 115848,16910 1 0 0 "FIN_SP1\n/5/" +I 29 25 0 Builtin Exit | 146004,95604 +I 28 25 0 Builtin Entry | 49237,230379 +L 27 26 0 TEXT "State Labels" | 72734,192775 1 0 0 "WAIT_RDY\n/3/" +S 26 25 16384 ELLIPSE "States" | 72734,192072 6500 6500 +H 25 21 0 RECT 0,0,0 0 0 1 255,255,255 0 | 29624,2084 214124,250084 +C 23 22 0 TEXT "Conditions" | 114630,116691 1 0 0 "SCTxPortGnt == 1'b1" +W 22 6 0 16 21 BEZIER "Transitions" | 112482,117158 112791,112755 112951,104607 113260,100204 +S 21 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 113767,93734 6500 6500 +L 20 21 0 TEXT "State Labels" | 113767,93734 1 0 0 "SP_SEND_PID" +A 19 17 16 TEXT "Actions" | 106114,144280 1 0 0 "sendPacketRdy <= 1'b0;\nSCTxPortReq <= 1'b1;" +C 18 17 0 TEXT "Conditions" | 111903,152311 1 0 0 "sendPacketWEn == 1'b1" +W 17 6 0 11 16 BEZIER "Transitions" | 110929,152860 111315,148225 111934,134981 112152,130145 +S 16 6 8192 ELLIPSE "States" | 112482,123658 6500 6500 S 47 6 28672 ELLIPSE "States" | 115848,16910 6500 6500 -W 48 6 8194 21 205 BEZIER "Transitions" | 108645,89734 97773,80901 77133,63853 66261,55020 +L 46 47 0 TEXT "State Labels" | 115848,16910 1 0 0 "FIN_SP1\n/5/" +S 45 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 182202,45960 6500 6500 +L 44 45 0 TEXT "State Labels" | 182202,45960 1 0 0 "SP_D0_D1" +W 39 25 0 33 29 BEZIER "Transitions" | 79375,148210 95944,135371 126275,108443 142844,95604 +A 38 33 4 TEXT "Actions" | 93627,154331 1 0 0 "SCTxPortWEn <= 1'b0;" +A 37 34 16 TEXT "Actions" | 67602,177580 1 0 0 "SCTxPortWEn <= 1'b1;\nSCTxPortData <= PIDNotPID;\nSCTxPortCntl <= `TX_PACKET_START;" +C 36 34 0 TEXT "Conditions" | 75236,185214 1 0 0 "SCTxPortRdy == 1'b1" +W 34 25 0 26 33 BEZIER "Transitions" | 72953,185597 73302,178879 73960,166205 74309,159487 +S 33 25 20480 ELLIPSE "States" | 75021,153035 6500 6500 +L 32 33 0 TEXT "State Labels" | 75021,153035 1 0 0 "FIN\n/4/" W 50 6 8193 21 45 BEZIER "Transitions" | 119169,90120 134042,80003 162156,60011 177029,49894 -H 65 45 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,2136 212900,250688 -W 73 6 0 45 47 BEZIER "Transitions" | 176581,42697 162161,37714 135904,25306 121888,19311 -W 74 6 0 205 47 BEZIER "Transitions" | 67096,47093 78647,41129 99521,27639 110324,20335 +W 48 6 8194 21 205 BEZIER "Transitions" | 108645,89734 97773,80901 77133,63853 66261,55020 +A 77 75 16 TEXT "Actions" | 56036,13776 1 0 0 "sendPacketRdy <= 1'b1;\nSCTxPortReq <= 1'b0;" W 75 6 0 47 11 BEZIER "Transitions" | 110250,13609 107004,12024 101864,9321 93182,8641\ 84500,7962 56262,8416 48108,10114 39955,11813\ 35575,18155 34480,31669 33386,45184 33386,92900\ 35198,110038 37010,127177 44258,148015 49996,153300\ 55734,158585 71438,158887 78535,158887 85632,158887\ 97934,159370 104276,159219 -A 77 75 16 TEXT "Actions" | 56036,13776 1 0 0 "sendPacketRdy <= 1'b1;\nSCTxPortReq <= 1'b0;" +W 74 6 0 205 47 BEZIER "Transitions" | 67096,47093 78647,41129 99521,27639 110324,20335 +W 73 6 0 45 47 BEZIER "Transitions" | 176581,42697 162161,37714 135904,25306 121888,19311 +H 65 45 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,2136 212900,250688 C 81 50 0 TEXT "Conditions" | 136027,85940 1 0 0 "PID == `DATA0 || PID == `DATA1" -I 127 65 0 Builtin Exit | 176933,37229 I 126 65 0 Builtin Entry | 68162,237252 -L 143 142 0 TEXT "State Labels" | 93499,188608 1 0 0 "WAIT_READ_FIFO\n/7/" -S 142 65 36864 ELLIPSE "States" | 93499,187905 6500 6500 -A 141 136 4 TEXT "Actions" | 118498,153974 1 0 0 "SCTxPortWEn <= 1'b1; \nSCTxPortData <= fifoData;\nSCTxPortCntl <= `TX_PACKET_STREAM;" -A 140 138 16 TEXT "Actions" | 77848,170826 1 0 0 "fifoReadEn <= 1'b1;" -C 139 138 0 TEXT "Conditions" | 93949,179372 1 0 0 "SCTxPortRdy == 1'b1" -W 138 65 0 142 212 BEZIER "Transitions" | 93778,181425 88301,173716 82823,166005 77346,158296 -L 137 136 0 TEXT "State Labels" | 97634,134508 1 0 0 "READ_FIFO\n/6/" -S 136 65 32768 ELLIPSE "States" | 97326,133352 6500 6500 +I 127 65 0 Builtin Exit | 176933,37229 W 128 65 0 126 145 BEZIER "Transitions" | 72704,237252 77515,245311 99394,235265 108723,227500 -L 159 158 0 TEXT "State Labels" | 59589,120610 1 0 0 "TERM_BYTE\n/10/" -S 158 65 49152 ELLIPSE "States" | 59589,119907 6500 6500 -A 157 152 4 TEXT "Actions" | 82022,67382 1 0 0 "SCTxPortWEn <= 1'b0;" -A 156 154 16 TEXT "Actions" | 58975,105373 1 0 0 "//Last byte is not valid data, \n//but the 'TX_PACKET_STOP' flag is required \n//by the SIE state machine to detect end of data packet\nSCTxPortWEn <= 1'b1;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= `TX_PACKET_STOP;" -C 155 154 0 TEXT "Conditions" | 61533,111844 1 0 0 "SCTxPortRdy == 1'b1" -W 154 65 0 158 152 BEZIER "Transitions" | 59808,113432 60157,106714 62272,79249 62621,72531 -L 153 152 0 TEXT "State Labels" | 63724,65778 1 0 0 "FIN\n/9/" -S 152 65 45056 ELLIPSE "States" | 63416,66086 6500 6500 -C 148 146 0 TEXT "Conditions" | 110699,212736 1 0 0 "fifoEmpty == 1'b0" -W 146 65 8193 145 142 BEZIER "Transitions" | 109258,216579 105891,210391 99971,199802 96604,193614 -S 145 65 40960 ELLIPSE "States" | 112500,222212 6500 6500 +S 136 65 32768 ELLIPSE "States" | 97326,133352 6500 6500 +L 137 136 0 TEXT "State Labels" | 97634,134508 1 0 0 "READ_FIFO\n/6/" +W 138 65 0 142 212 BEZIER "Transitions" | 93778,181425 88301,173716 82823,166005 77346,158296 +C 139 138 0 TEXT "Conditions" | 93949,179372 1 0 0 "SCTxPortRdy == 1'b1" +A 140 138 16 TEXT "Actions" | 77848,170826 1 0 0 "fifoReadEn <= 1'b1;" +A 141 136 4 TEXT "Actions" | 118498,153974 1 0 0 "SCTxPortWEn <= 1'b1; \nSCTxPortData <= fifoData;\nSCTxPortCntl <= `TX_PACKET_STREAM;" +S 142 65 36864 ELLIPSE "States" | 93499,187905 6500 6500 +L 143 142 0 TEXT "State Labels" | 93499,188608 1 0 0 "WAIT_READ_FIFO\n/7/" L 144 145 0 TEXT "State Labels" | 111719,222145 1 0 0 "FIFO_EMPTY\n/8/" -I 175 0 2 Builtin OutPort | 155450,237706 "" "" -L 174 173 0 TEXT "Labels" | 41299,213676 1 0 0 "PID[3:0]" -I 173 0 130 Builtin InPort | 35299,213676 "" "" -L 172 171 0 TEXT "Labels" | 39427,218968 1 0 0 "sendPacketRdy" -I 171 0 2 Builtin OutPort | 33427,218968 "" "" -I 170 0 2 Builtin InPort | 35414,224168 "" "" -L 169 170 0 TEXT "Labels" | 41414,224168 1 0 0 "sendPacketWEn" -I 168 0 2 Builtin OutPort | 99800,215222 "" "" -L 167 168 0 TEXT "Labels" | 105800,214970 1 0 0 "fifoReadEn" -L 166 165 0 TEXT "Labels" | 108007,220336 1 0 0 "fifoData[7:0]" -I 165 0 130 Builtin InPort | 102007,220336 "" "" -I 164 0 2 Builtin InPort | 101658,228164 "" "" -L 163 164 0 TEXT "Labels" | 107658,228164 1 0 0 "fifoEmpty" -W 162 65 0 152 127 BEZIER "Transitions" | 69206,63133 84852,58192 113349,46697 126570,43677\ - 139792,40658 161594,38692 165369,38074 169145,37457\ - 170187,37688 173773,37229 +S 145 65 40960 ELLIPSE "States" | 112500,222212 6500 6500 +W 146 65 8193 145 142 BEZIER "Transitions" | 109258,216579 105891,210391 99971,199802 96604,193614 +C 148 146 0 TEXT "Conditions" | 110699,212736 1 0 0 "fifoEmpty == 1'b0" +S 152 65 45056 ELLIPSE "States" | 63416,66086 6500 6500 +L 153 152 0 TEXT "State Labels" | 63724,65778 1 0 0 "FIN\n/9/" +W 154 65 0 158 152 BEZIER "Transitions" | 59808,113432 60157,106714 62272,79249 62621,72531 +C 155 154 0 TEXT "Conditions" | 61533,111844 1 0 0 "SCTxPortRdy == 1'b1" +A 156 154 16 TEXT "Actions" | 58975,105373 1 0 0 "//Last byte is not valid data, \n//but the 'TX_PACKET_STOP' flag is required \n//by the SIE state machine to detect end of data packet\nSCTxPortWEn <= 1'b1;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= `TX_PACKET_STOP;" +A 157 152 4 TEXT "Actions" | 82022,67382 1 0 0 "SCTxPortWEn <= 1'b0;" +S 158 65 49152 ELLIPSE "States" | 59589,119907 6500 6500 +L 159 158 0 TEXT "State Labels" | 59589,120610 1 0 0 "TERM_BYTE\n/10/" W 160 65 8194 145 158 BEZIER "Transitions" | 106145,220849 94342,218470 70892,213593 64258,206319\ 57625,199045 54697,174705 54514,164091 54331,153478\ 57228,135338 58326,126280 -C 191 13 0 TEXT "Conditions" | 86196,196179 1 0 0 "rst" -L 190 189 0 TEXT "Labels" | 204532,251890 1 0 0 "rst" -I 189 0 2 Builtin InPort | 198532,251890 "" "" -I 188 0 3 Builtin InPort | 198206,245948 "" "" -L 187 188 0 TEXT "Labels" | 204206,245948 1 0 0 "clk" -L 186 185 0 TEXT "Labels" | 162179,213226 1 0 0 "SCTxPortCntl[7:0]" -I 185 0 130 Builtin OutPort | 156179,213226 "" "" -L 184 183 0 TEXT "Labels" | 162035,218266 1 0 0 "SCTxPortData[7:0]" -I 183 0 130 Builtin OutPort | 156035,218266 "" "" -L 182 181 0 TEXT "Labels" | 164231,223036 1 0 0 "SCTxPortRdy" -I 181 0 2 Builtin InPort | 158231,223036 "" "" -I 180 0 2 Builtin OutPort | 155564,228002 "" "" -L 179 180 0 TEXT "Labels" | 161564,228002 1 0 0 "SCTxPortWEn" -L 178 177 0 TEXT "Labels" | 163583,232918 1 0 0 "SCTxPortGnt" -I 177 0 2 Builtin InPort | 157583,232918 "" "" +W 162 65 0 152 127 BEZIER "Transitions" | 69206,63133 84852,58192 113349,46697 126570,43677\ + 139792,40658 161594,38692 165369,38074 169145,37457\ + 170187,37688 173773,37229 +L 163 164 0 TEXT "Labels" | 107658,228164 1 0 0 "fifoEmpty" +I 164 0 2 Builtin InPort | 101658,228164 "" "" +I 165 0 130 Builtin InPort | 102007,220336 "" "" +L 166 165 0 TEXT "Labels" | 108007,220336 1 0 0 "fifoData[7:0]" +L 167 168 0 TEXT "Labels" | 105800,214970 1 0 0 "fifoReadEn" +I 168 0 2 Builtin OutPort | 99800,215222 "" "" +L 169 170 0 TEXT "Labels" | 41414,224168 1 0 0 "sendPacketWEn" +I 170 0 2 Builtin InPort | 35414,224168 "" "" +I 171 0 2 Builtin OutPort | 33427,218968 "" "" +L 172 171 0 TEXT "Labels" | 39427,218968 1 0 0 "sendPacketRdy" +I 173 0 130 Builtin InPort | 35299,213676 "" "" +L 174 173 0 TEXT "Labels" | 41299,213676 1 0 0 "PID[3:0]" +I 175 0 2 Builtin OutPort | 155450,237706 "" "" L 176 175 0 TEXT "Labels" | 161450,237706 1 0 0 "SCTxPortReq" -S 207 65 57344 ELLIPSE "States" | 163561,124222 6500 6500 -L 206 207 0 TEXT "State Labels" | 163561,124222 1 0 0 "CLR_WEN\n/12/" -A 192 9 2 TEXT "Actions" | 127282,199550 1 0 0 "sendPacketRdy <= 1'b1;\nfifoReadEn <= 1'b0;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= 8'h00;\nSCTxPortWEn <= 1'b0;\nSCTxPortReq <= 1'b0;" -L 194 195 0 TEXT "Labels" | 38000,231468 1 0 0 "PIDNotPID[7:0]" -I 195 0 128 Builtin Signal | 35000,231468 "" "" -L 204 205 0 TEXT "State Labels" | 61573,50520 1 0 0 "SP_NOT_DATA\n/11/" +I 177 0 2 Builtin InPort | 157583,232918 "" "" +L 178 177 0 TEXT "Labels" | 163583,232918 1 0 0 "SCTxPortGnt" +L 179 180 0 TEXT "Labels" | 161564,228002 1 0 0 "SCTxPortWEn" +I 180 0 2 Builtin OutPort | 155564,228002 "" "" +I 181 0 2 Builtin InPort | 158231,223036 "" "" +L 182 181 0 TEXT "Labels" | 164231,223036 1 0 0 "SCTxPortRdy" +I 183 0 130 Builtin OutPort | 156035,218266 "" "" +L 184 183 0 TEXT "Labels" | 162035,218266 1 0 0 "SCTxPortData[7:0]" +I 185 0 130 Builtin OutPort | 156179,213226 "" "" +L 186 185 0 TEXT "Labels" | 162179,213226 1 0 0 "SCTxPortCntl[7:0]" +L 187 188 0 TEXT "Labels" | 204206,245948 1 0 0 "clk" +I 188 0 3 Builtin InPort | 198206,245948 "" "" +I 189 0 2 Builtin InPort | 198532,251890 "" "" +L 190 189 0 TEXT "Labels" | 204532,251890 1 0 0 "rst" +C 191 13 0 TEXT "Conditions" | 86196,196179 1 0 0 "rst" S 205 6 53248 ELLIPSE "States" | 61573,50520 6500 6500 +L 204 205 0 TEXT "State Labels" | 61573,50520 1 0 0 "SP_NOT_DATA\n/11/" +I 195 0 128 Builtin Signal | 35000,231468 "" "" +L 194 195 0 TEXT "Labels" | 38000,231468 1 0 0 "PIDNotPID[7:0]" +A 192 9 2 TEXT "Actions" | 127282,199550 1 0 0 "sendPacketRdy <= 1'b1;\nfifoReadEn <= 1'b0;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= 8'h00;\nSCTxPortWEn <= 1'b0;\nSCTxPortReq <= 1'b0;" +L 206 207 0 TEXT "State Labels" | 163561,124222 1 0 0 "CLR_WEN\n/12/" +S 207 65 57344 ELLIPSE "States" | 163561,124222 6500 6500 +W 214 65 0 212 136 BEZIER "Transitions" | 81800,147464 84861,145094 89728,140374 92789,138004 +A 213 212 4 TEXT "Actions" | 88033,161295 1 0 0 "fifoReadEn <= 1'b0;" +S 212 65 61440 ELLIPSE "States" | 76973,151815 6500 6500 +L 211 212 0 TEXT "State Labels" | 76973,151815 1 0 0 "CLR_REN\n/13/" +A 208 207 4 TEXT "Actions" | 145246,113566 1 0 0 "SCTxPortWEn <= 1'b0;" +W 209 65 0 136 207 BEZIER "Transitions" | 103712,132145 117531,130730 143304,126529 157123,125114 W 210 65 0 207 145 BEZIER "Transitions" | 169895,125680 176804,126013 188953,127552 193864,130465\ 198775,133379 204604,144369 205686,152818 206768,161268\ 205269,184079 201481,192903 197694,201727 184040,214216\ 173218,217462 162396,220708 133810,221642 118992,221891 -W 209 65 0 136 207 BEZIER "Transitions" | 103712,132145 117531,130730 143304,126529 157123,125114 -A 208 207 4 TEXT "Actions" | 145246,113566 1 0 0 "SCTxPortWEn <= 1'b0;" -L 211 212 0 TEXT "State Labels" | 76973,151815 1 0 0 "CLR_REN\n/13/" -S 212 65 61440 ELLIPSE "States" | 76973,151815 6500 6500 -A 213 212 4 TEXT "Actions" | 88033,161295 1 0 0 "fifoReadEn <= 1'b0;" -W 214 65 0 212 136 BEZIER "Transitions" | 81800,147464 84861,145094 89728,140374 92789,138004 END 1.4 +0 -5 usbhostslave/RTL/slaveController/slaveSendpacket.v http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slaveSendpacket.v.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slaveSendpacket.v =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slaveSendpacket.v,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slaveSendpacket.v 31 Dec 2004 14:40:44 -0000 1.3 +++ slaveSendpacket.v 20 Jan 2005 13:48:09 -0000 1.4 @@ -42,14 +42,6 @@ //// //// ////////////////////////////////////////////////////////////////////// // -// $Id: slaveSendpacket.v,v 1.3 2004/12/31 14:40:44 sfielding Exp $ -// -// CVS Revision History -// -// $Log: slaveSendpacket.v,v $ -// Revision 1.3 2004/12/31 14:40:44 sfielding -// Fixed some blocking assignments, changed module name, fixed SOF_TX_TIME -// // `timescale 1ns / 1ps `include "usbSerialInterfaceEngine_h.v" 1.4 +248 -248 usbhostslave/RTL/slaveController/slavecontroller.asf http://www.opencores.org/cvsweb.shtml/usbhostslave/RTL/slaveController/slavecontroller.asf.diff?r1=1.3&r2=1.4 (In the diff below, changes in quantity of whitespace are not shown.) Index: slavecontroller.asf =================================================================== RCS file: /cvsroot/sfielding/usbhostslave/RTL/slaveController/slavecontroller.asf,v retrieving revision 1.3 retrieving revision 1.4 diff -u -b -r1.3 -r1.4 --- slavecontroller.asf 31 Dec 2004 14:40:44 -0000 1.3 +++ slavecontroller.asf 20 Jan 2005 13:48:11 -0000 1.4 @@ -6,7 +6,7 @@ ENTITY="slavecontroller" FRAMES=ON FREEOID=789 -"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveController\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n// $Id: slavecontroller.asf,v 1.3 2004/12/31 14:40:44 sfielding Exp $\n//\n// CVS Revision History\n//\n// $Log$\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbSlaveControl_h.v\"\n`include \"usbConstants_h.v\"\n\n" +"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// slaveController\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@b... ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbSlaveControl_h.v\"\n`include \"usbConstants_h.v\"\n\n" END BUNDLES B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0 @@ -73,286 +73,286 @@ GRIDSIZE 0,0 10000,10000 END OBJECTS -L 554 551 0 TEXT "State Labels" | 63527,72146 1 0 0 "SETUP_OUT" -S 551 6 40964 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 63527,72146 6500 6500 -H 559 551 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3275 212900,251275 -W 550 6 0 81 41 BEZIER "Transitions" | 57945,41731 51978,46294 36355,53695 33342,69899\ - 30330,86104 25492,143212 35905,156667 46318,170122\ - 96612,168665 117496,167729 -A 548 546 16 TEXT "Actions" | 104043,25328 1 0 0 "USBEndPNakTransTypeReg <= tempUSBEndPTransTypeReg;\nendPMuxErrorsWEn <= 1'b1;" -C 547 546 0 TEXT "Conditions" | 180628,44450 1 0 0 "NAKSent == 1'b1" +G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 110650,252232 1 0 0 "Module: slavecontroller" +F 6 0 671089152 282 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,202584 +L 7 6 0 TEXT "Labels" | 30788,196844 1 0 0 "slvCntrl" +L 14 15 0 TEXT "State Labels" | 111713,189976 1 0 0 "START" +S 15 6 86020 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 111713,189976 6500 6500 +L 272 271 0 TEXT "Labels" | 186628,209022 1 0 0 "getPacketREn" +I 273 0 130 Builtin InPort | 182869,214288 "" "" +L 274 273 0 TEXT "Labels" | 190399,213982 1 0 0 "getPacketRdy" +L 281 282 0 TEXT "Labels" | 202539,250534 1 0 0 "clk" +I 282 0 3 Builtin InPort | 194091,250840 "" "" +L 283 284 0 TEXT "Labels" | 200131,244906 1 0 0 "rst" +I 284 0 2 Builtin InPort | 194131,244906 "" "" +C 285 97 0 TEXT "Conditions" | 99944,129593 1 0 0 "rst" W 546 6 8194 531 81 BEZIER "Transitions" | 193355,54360 193121,48042 196557,33707 194740,28964\ 192923,24221 173766,19421 163644,19865 153522,20309\ 122483,20608 111915,23020 101347,25432 81761,37919\ 69710,37919 -C 285 97 0 TEXT "Conditions" | 99944,129593 1 0 0 "rst" -I 284 0 2 Builtin InPort | 194131,244906 "" "" -L 283 284 0 TEXT "Labels" | 200131,244906 1 0 0 "rst" -I 282 0 3 Builtin InPort | 194091,250840 "" "" -L 281 282 0 TEXT "Labels" | 202539,250534 1 0 0 "clk" -L 274 273 0 TEXT "Labels" | 190399,213982 1 0 0 "getPacketRdy" -I 273 0 130 Builtin InPort | 182869,214288 "" "" -L 272 271 0 TEXT "Labels" | 186628,209022 1 0 0 "getPacketREn" -S 15 6 86020 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 111713,189976 6500 6500 -L 14 15 0 TEXT "State Labels" | 111713,189976 1 0 0 "START" -L 7 6 0 TEXT "Labels" | 30788,196844 1 0 0 "slvCntrl" -F 6 0 671089152 282 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,202584 -G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 110650,252232 1 0 0 "Module: slavecontroller" -A 302 83 16 TEXT "Actions" | 100377,150834 1 0 0 "PIDByte <= RxByte;" -L 301 300 0 TEXT "Labels" | 38188,235738 1 0 0 "sendPacketRdy" -I 300 0 130 Builtin InPort | 30658,236044 "" "" -L 299 298 0 TEXT "Labels" | 34135,231226 1 0 0 "sendPacketWEn" -I 298 0 2 Builtin OutPort | 28486,231226 "" "" +C 547 546 0 TEXT "Conditions" | 180628,44450 1 0 0 "NAKSent == 1'b1" +A 548 546 16 TEXT "Actions" | 104043,25328 1 0 0 "USBEndPNakTransTypeReg <= tempUSBEndPTransTypeReg;\nendPMuxErrorsWEn <= 1'b1;" +W 550 6 0 81 41 BEZIER "Transitions" | 57945,41731 51978,46294 36355,53695 33342,69899\ + 30330,86104 25492,143212 35905,156667 46318,170122\ + 96612,168665 117496,167729 +H 559 551 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3275 212900,251275 +S 551 6 40964 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 63527,72146 6500 6500 +L 554 551 0 TEXT "State Labels" | 63527,72146 1 0 0 "SETUP_OUT" A 291 81 4 TEXT "Actions" | 34763,22801 1 0 0 "transDone <= 1'b0;\nclrEPRdy <= 1'b0;\nendPMuxErrorsWEn <= 1'b0;" -I 588 589 0 Builtin Entry | 89368,239805 -I 587 589 0 Builtin Exit | 192962,45432 -L 586 580 0 TEXT "State Labels" | 176572,76868 1 0 0 "IN" -S 580 6 45060 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 176572,76868 6500 6500 -H 589 580 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,249826 -L 40 41 0 TEXT "State Labels" | 123993,167263 1 0 0 "WAIT_RX1\n/0/" +I 298 0 2 Builtin OutPort | 28486,231226 "" "" +L 299 298 0 TEXT "Labels" | 34135,231226 1 0 0 "sendPacketWEn" +I 300 0 130 Builtin InPort | 30658,236044 "" "" +L 301 300 0 TEXT "Labels" | 38188,235738 1 0 0 "sendPacketRdy" +A 302 83 16 TEXT "Actions" | 100377,150834 1 0 0 "PIDByte <= RxByte;" S 41 6 0 ELLIPSE "States" | 123993,167568 6500 6500 -C 607 601 0 TEXT "Conditions" | 114440,220845 1 0 0 "USBEndPControlReg [`ENDPOINT_READY_BIT] == 1'b0" -W 606 589 0 588 605 BEZIER "Transitions" | 89368,237478 89903,233730 89797,226993 90332,223245 -S 605 589 53248 ELLIPSE "States" | 91340,216824 6500 6500 -L 604 605 0 TEXT "State Labels" | 91340,216824 1 0 0 "CHK_RDY\n/10/" -A 603 596 4 TEXT "Actions" | 174409,172080 1 0 0 "sendPacketWEn <= 1'b0;" -W 601 589 8193 605 596 BEZIER "Transitions" | 97839,216722 109714,216534 162558,220059 167812,183210 -W 600 589 8192 596 587 BEZIER "Transitions" | 168405,170293 203966,131503 199503,89144 196184,45432 -A 599 601 16 TEXT "Actions" | 124386,212388 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `NAK;\nNAKSent <= 1'b1;" -C 598 600 0 TEXT "Conditions" | 159138,161356 1 0 0 "sendPacketRdy == 1'b1" -L 597 596 0 TEXT "State Labels" | 169718,177574 1 0 0 "NAK_STALL\n/9/" +L 40 41 0 TEXT "State Labels" | 123993,167263 1 0 0 "WAIT_RX1\n/0/" +H 589 580 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,249826 +S 580 6 45060 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 176572,76868 6500 6500 +L 586 580 0 TEXT "State Labels" | 176572,76868 1 0 0 "IN" +I 587 589 0 Builtin Exit | 192962,45432 +I 588 589 0 Builtin Entry | 89368,239805 S 596 589 49152 ELLIPSE "States" | 168684,176772 6500 6500 -W 621 618 0 619 620 BEZIER "Transitions" | 100816,152400 114862,136691 127511,117310 141558,101600 -I 620 618 0 Builtin Exit | 144780,101600 -I 619 618 0 Builtin Entry | 96520,152400 -H 618 617 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,251000 -S 617 589 57364 ELLIPSE "Junction" | 50796,174902 3500 3500 -L 616 617 0 TEXT "State Labels" | 50796,174902 1 0 0 "J2" -A 615 612 16 TEXT "Actions" | 110702,185120 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `STALL;\nstallSent <= 1'b1;" -C 614 612 0 TEXT "Conditions" | 69153,194735 1 0 0 "USBEndPControlReg [`ENDPOINT_SEND_STALL_BIT] == 1'b1" -W 613 589 8195 605 617 BEZIER "Transitions" | 86536,212447 76974,203420 61686,186612 53042,177585 +L 597 596 0 TEXT "State Labels" | 169718,177574 1 0 0 "NAK_STALL\n/9/" +C 598 600 0 TEXT "Conditions" | 159138,161356 1 0 0 "sendPacketRdy == 1'b1" +A 599 601 16 TEXT "Actions" | 124386,212388 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `NAK;\nNAKSent <= 1'b1;" +W 600 589 8192 596 587 BEZIER "Transitions" | 168405,170293 203966,131503 199503,89144 196184,45432 +W 601 589 8193 605 596 BEZIER "Transitions" | 97839,216722 109714,216534 162558,220059 167812,183210 +A 603 596 4 TEXT "Actions" | 174409,172080 1 0 0 "sendPacketWEn <= 1'b0;" +L 604 605 0 TEXT "State Labels" | 91340,216824 1 0 0 "CHK_RDY\n/10/" +S 605 589 53248 ELLIPSE "States" | 91340,216824 6500 6500 +W 606 589 0 588 605 BEZIER "Transitions" | 89368,237478 89903,233730 89797,226993 90332,223245 +C 607 601 0 TEXT "Conditions" | 114440,220845 1 0 0 "USBEndPControlReg [`ENDPOINT_READY_BIT] == 1'b0" W 612 589 8194 605 596 BEZIER "Transitions" | 91984,210359 90899,202871 142592,172810 163035,179986 -L 639 640 0 TEXT "State Labels" | 125814,48840 1 0 0 "GET_RESP\n/12/" -A 638 631 16 TEXT "Actions" | 118603,107061 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `DATA1;" -A 637 630 16 TEXT "Actions" | 36344,101376 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `DATA0;" -C 636 630 0 TEXT "Conditions" | 29568,129096 1 0 0 "USBEndPControlReg [`ENDPOINT_OUTDATA_SEQUENCE_BIT] == 1'b0" -W 631 589 8194 617 629 BEZIER "Transitions" | 54075,173680 59927,171524 83885,163128 122946,146882\ - 162008,130636 145376,121704 139603,106244 133831,90784\ - 72380,75586 70378,71274 +W 613 589 8195 605 617 BEZIER "Transitions" | 86536,212447 76974,203420 61686,186612 53042,177585 +C 614 612 0 TEXT "Conditions" | 69153,194735 1 0 0 "USBEndPControlReg [`ENDPOINT_SEND_STALL_BIT] == 1'b1" +A 615 612 16 TEXT "Actions" | 110702,185120 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `STALL;\nstallSent <= 1'b1;" +L 616 617 0 TEXT "State Labels" | 50796,174902 1 0 0 "J2" +S 617 589 57364 ELLIPSE "Junction" | 50796,174902 3500 3500 +H 618 617 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,251000 +I 619 618 0 Builtin Entry | 96520,152400 +I 620 618 0 Builtin Exit | 144780,101600 +W 621 618 0 619 620 BEZIER "Transitions" | 100816,152400 114862,136691 127511,117310 141558,101600 +L 80 81 0 TEXT "State Labels" | 63570,37922 1 0 0 "FIN_SC\n/1/" +S 81 6 4096 ELLIPSE "States" | 63211,37922 6500 6500 +W 82 6 0 15 41 BEZIER "Transitions" | 111847,183487 114548,179878 117251,176267 119952,172658 +W 83 6 0 41 376 BEZIER "Transitions" | 122170,161331 124629,151114 122118,150575 124577,140358 +L 628 629 0 TEXT "State Labels" | 67392,65502 1 0 0 "DATA\n/11/" +S 629 589 61440 ELLIPSE "States" | 67392,65502 6500 6500 W 630 589 8193 617 629 BEZIER "Transitions" | 48383,172368 44995,170520 39116,166056 37345,163515\ 35574,160974 35266,154506 35651,142263 36036,130020\ 37884,87516 41041,76736 44198,65956 54978,65340\ 57981,65109 60984,64878 60379,64505 60995,64351 -S 629 589 61440 ELLIPSE "States" | 67392,65502 6500 6500 -L 628 629 0 TEXT "State Labels" | 67392,65502 1 0 0 "DATA\n/11/" -W 83 6 0 41 376 BEZIER "Transitions" | 122170,161331 124629,151114 122118,150575 124577,140358 -W 82 6 0 15 41 BEZIER "Transitions" | 111847,183487 114548,179878 117251,176267 119952,172658 -S 81 6 4096 ELLIPSE "States" | 63211,37922 6500 6500 -L 80 81 0 TEXT "State Labels" | 63570,37922 1 0 0 "FIN_SC\n/1/" -L 655 654 0 TEXT "State Labels" | 92422,152802 1 0 0 "CHK\n/13/" -S 654 559 69632 ELLIPSE "States" | 92422,152802 6500 6500 -W 653 559 8192 649 690 BEZIER "Transitions" | 42267,243103 56803,242798 88976,238518 92493,238212 -C 652 651 0 TEXT "Conditions" | 124856,135409 1 0 0 "USBEndPControlReg [`ENDPOINT_READY_BIT] == 1'b0" -W 651 559 8193 654 656 BEZIER "Transitions" | 98921,152700 206574,151900 173740,105072 113816,89949 -I 650 559 0 Builtin Exit | 194044,45058 -I 649 559 0 Builtin Entry | 37971,243103 -C 647 646 0 TEXT "Conditions" | 140247,52755 1 0 0 "getPacketRdy == 1'b1" -W 646 589 0 640 587 BEZIER "Transitions" | 132288,49411 139757,47794 182271,47049 189740,45432 -A 645 640 4 TEXT "Actions" | 108652,38924 1 0 0 "getPacketREn <= 1'b0;" -A 644 641 16 TEXT "Actions" | 75293,54584 1 0 0 "getPacketREn <= 1'b1;" -C 643 641 0 TEXT "Conditions" | 73811,60869 1 0 0 "sendPacketRdy == 1'b1" -A 642 629 4 TEXT "Actions" | 76076,71808 1 0 0 "sendPacketWEn <= 1'b0;" -W 641 589 0 629 640 BEZIER "Transitions" | 73191,62566 81815,59948 110822,52759 119446,50141 -S 640 589 65536 ELLIPSE "States" | 125814,48840 6500 6500 -I 381 377 0 Builtin Exit | 206487,14249 -I 380 377 0 Builtin Entry | 48940,236580 -H 377 376 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,251000 -S 376 6 94212 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 127085,134364 6500 6500 -L 375 376 0 TEXT "State Labels" | 127082,135048 1 0 0 "GET_TOKEN" -C 98 83 0 TEXT "Conditions" | 135898,150246 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus == `RX_PACKET_START && \nRxByte[1:0] == `TOKEN" -W 97 722 0 96 723 BEZIER "Transitions" | 76296,129336 85450,126984 105102,130518 114256,128166 +W 631 589 8194 617 629 BEZIER "Transitions" | 54075,173680 59927,171524 83885,163128 122946,146882\ + 162008,130636 145376,121704 139603,106244 133831,90784\ + 72380,75586 70378,71274 +C 636 630 0 TEXT "Conditions" | 29568,129096 1 0 0 "USBEndPControlReg [`ENDPOINT_OUTDATA_SEQUENCE_BIT] == 1'b0" +A 637 630 16 TEXT "Actions" | 36344,101376 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `DATA0;" +A 638 631 16 TEXT "Actions" | 118603,107061 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `DATA1;" +L 639 640 0 TEXT "State Labels" | 125814,48840 1 0 0 "GET_RESP\n/12/" I 96 722 0 Builtin Reset | 76296,129336 -C 660 658 0 TEXT "Conditions" | 106335,67684 1 0 0 "sendPacketRdy == 1'b1" -C 666 664 0 TEXT "Conditions" | 53275,145515 1 0 0 "USBEndPControlReg [`ENDPOINT_SEND_STALL_BIT] == 1'b1" -A 665 664 16 TEXT "Actions" | 80842,130315 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `STALL;\nstallSent <= 1'b1;" -W 664 559 8194 654 656 BEZIER "Transitions" | 93066,146337 91981,138849 92975,108162 108216,91470 -L 661 656 0 TEXT "State Labels" | 110208,84806 1 0 0 "SEND\n/14/" -A 659 651 16 TEXT "Actions" | 154655,125925 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `NAK;\nNAKSent <= 1'b1;" -W 658 559 8192 656 650 BEZIER "Transitions" | 115135,82483 143029,70601 162928,56940 190822,45058 -A 657 656 4 TEXT "Actions" | 131151,85140 1 0 0 "sendPacketWEn <= 1'b0;" -S 656 559 73728 ELLIPSE "States" | 109789,85208 5889 6500 -I 399 377 0 Builtin Link | 54419,17564 -L 398 399 0 TEXT "Labels" | 56547,17304 1 0 0 "WAIT_RX1" -A 394 388 16 TEXT "Actions" | 109989,182895 1 0 0 "addrEndPTemp <= RxByte;" -L 393 392 0 TEXT "State Labels" | 120066,166529 1 0 0 "WAIT_CRC\n/2/" -S 392 377 8192 ELLIPSE "States" | 120690,166529 6500 6500 -C 389 388 0 TEXT "Conditions" | 120725,194517 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus == `RX_PACKET_STREAM" -W 388 377 8193 384 392 BEZIER "Transitions" | 117619,196179 118049,188396 118224,180484 118654,172701 -L 385 384 0 TEXT "State Labels" | 117245,202194 1 0 0 "WAIT_ADDR\n/3/" +W 97 722 0 96 723 BEZIER "Transitions" | 76296,129336 85450,126984 105102,130518 114256,128166 +C 98 83 0 TEXT "Conditions" | 135898,150246 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus == `RX_PACKET_START && \nRxByte[1:0] == `TOKEN" +L 375 376 0 TEXT "State Labels" | 127082,135048 1 0 0 "GET_TOKEN" +S 376 6 94212 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 127085,134364 6500 6500 +H 377 376 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,251000 +I 380 377 0 Builtin Entry | 48940,236580 +I 381 377 0 Builtin Exit | 206487,14249 +S 640 589 65536 ELLIPSE "States" | 125814,48840 6500 6500 +W 641 589 0 629 640 BEZIER "Transitions" | 73191,62566 81815,59948 110822,52759 119446,50141 +A 642 629 4 TEXT "Actions" | 76076,71808 1 0 0 "sendPacketWEn <= 1'b0;" +C 643 641 0 TEXT "Conditions" | 73811,60869 1 0 0 "sendPacketRdy == 1'b1" +A 644 641 16 TEXT "Actions" | 75293,54584 1 0 0 "getPacketREn <= 1'b1;" +A 645 640 4 TEXT "Actions" | 108652,38924 1 0 0 "getPacketREn <= 1'b0;" +W 646 589 0 640 587 BEZIER "Transitions" | 132288,49411 139757,47794 182271,47049 189740,45432 +C 647 646 0 TEXT "Conditions" | 140247,52755 1 0 0 "getPacketRdy == 1'b1" +I 649 559 0 Builtin Entry | 37971,243103 +I 650 559 0 Builtin Exit | 194044,45058 +W 651 559 8193 654 656 BEZIER "Transitions" | 98921,152700 206574,151900 173740,105072 113816,89949 +C 652 651 0 TEXT "Conditions" | 124856,135409 1 0 0 "USBEndPControlReg [`ENDPOINT_READY_BIT] == 1'b0" +W 653 559 8192 649 690 BEZIER "Transitions" | 42267,243103 56803,242798 88976,238518 92493,238212 +S 654 559 69632 ELLIPSE "States" | 92422,152802 6500 6500 +L 655 654 0 TEXT "State Labels" | 92422,152802 1 0 0 "CHK\n/13/" S 384 377 12288 ELLIPSE "States" | 116864,202628 6500 6500 -A 410 404 16 TEXT "Actions" | 120222,150346 1 0 0 "endpCRCTemp <= RxByte;" -C 409 406 0 TEXT "Conditions" | 56206,176408 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus != `RX_PACKET_STREAM" -W 406 377 8194 392 399 BEZIER "Transitions" | 114191,166474 101160,166788 74889,166988 67471,166085\ - 60053,165183 57484,160822 55722,148570 53960,136319\ - 36935,95064 38880,77714 40826,60365 38327,20823\ - 54419,15564 -C 405 404 0 TEXT "Conditions" | 124159,160729 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus == `RX_PACKET_STREAM" -W 404 377 8193 392 403 BEZIER "Transitions" | 121200,160058 121710,155348 122669,146268 123179,141558 -S 403 377 16384 ELLIPSE "States" | 124030,135117 6500 6500 -L 402 403 0 TEXT "State Labels" | 124030,135117 1 0 0 "WAIT_STOP\n/4/" -C 401 400 0 TEXT "Conditions" | 52882,213899 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus != `RX_PACKET_STREAM" +L 385 384 0 TEXT "State Labels" | 117245,202194 1 0 0 "WAIT_ADDR\n/3/" +W 388 377 8193 384 392 BEZIER "Transitions" | 117619,196179 118049,188396 118224,180484 118654,172701 +C 389 388 0 TEXT "Conditions" | 120725,194517 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus == `RX_PACKET_STREAM" +S 392 377 8192 ELLIPSE "States" | 120690,166529 6500 6500 +L 393 392 0 TEXT "State Labels" | 120066,166529 1 0 0 "WAIT_CRC\n/2/" +A 394 388 16 TEXT "Actions" | 109989,182895 1 0 0 "addrEndPTemp <= RxByte;" +L 398 399 0 TEXT "Labels" | 56547,17304 1 0 0 "WAIT_RX1" +I 399 377 0 Builtin Link | 54419,17564 +S 656 559 73728 ELLIPSE "States" | 109789,85208 5889 6500 +A 657 656 4 TEXT "Actions" | 131151,85140 1 0 0 "sendPacketWEn <= 1'b0;" +W 658 559 8192 656 650 BEZIER "Transitions" | 115135,82483 143029,70601 162928,56940 190822,45058 +A 659 651 16 TEXT "Actions" | 154655,125925 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `NAK;\nNAKSent <= 1'b1;" +L 661 656 0 TEXT "State Labels" | 110208,84806 1 0 0 "SEND\n/14/" +W 664 559 8194 654 656 BEZIER "Transitions" | 93066,146337 91981,138849 92975,108162 108216,91470 +A 665 664 16 TEXT "Actions" | 80842,130315 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `STALL;\nstallSent <= 1'b1;" +C 666 664 0 TEXT "Conditions" | 53275,145515 1 0 0 "USBEndPControlReg [`ENDPOINT_SEND_STALL_BIT] == 1'b1" +C 660 658 0 TEXT "Conditions" | 106335,67684 1 0 0 "sendPacketRdy == 1'b1" W 400 377 8194 384 399 BEZIER "Transitions" | 110498,201318 102308,200382 54233,209312 50372,191138\ 46511,172964 33727,90292 34975,71611 36223,52930\ 35724,34993 37785,28932 39847,22872 46307,16188\ 54419,15564 -W 703 559 0 690 698 BEZIER "Transitions" | 102158,232416 105512,227268 111593,217805 114947,212657 -W 702 699 0 700 701 BEZIER "Transitions" | 100816,152400 114718,136923 127655,117078 141558,101600 -I 701 699 0 Builtin Exit | 144780,101600 -I 700 699 0 Builtin Entry | 96520,152400 -H 699 698 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,251000 -S 698 559 81940 ELLIPSE "Junction" | 117000,209824 3500 3500 -L 697 698 0 TEXT "State Labels" | 117000,209824 1 0 0 "J3" -W 696 559 8194 698 650 BEZIER "Transitions" | 120484,209499 143962,203805 174018,217078 187161,210058\ - 200304,203038 205920,186346 207441,167119 208962,147892\ - 209430,87676 208962,71608 208494,55540 206154,51484\ - 204438,50041 202722,48598 199528,45916 197266,45058 -A 695 694 16 TEXT "Actions" | 32235,126207 1 0 0 "sendPacketWEn <= 1'b1;\nsendPacketPID <= `ACK;" +C 401 400 0 TEXT "Conditions" | 52882,213899 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus != `RX_PACKET_STREAM" +L 402 403 0 TEXT "State Labels" | 124030,135117 1 0 0 "WAIT_STOP\n/4/" +S 403 377 16384 ELLIPSE "States" | 124030,135117 6500 6500 +W 404 377 8193 392 403 BEZIER "Transitions" | 121200,160058 121710,155348 122669,146268 123179,141558 +C 405 404 0 TEXT "Conditions" | 124159,160729 1 0 0 "RxDataWEn == 1'b1 && \nRxStatus == `RX_PACKET_STREAM" +W 406 377 8194 392 399 BEZIER "Transitions" | 114191,166474 101160,166788 74889,166988 67471,166085\ + 60053,165183