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Message
From: OpenCores CVS Agent<cvs@w...>
Date: Wed Dec 10 13:03:01 CET 2003
Subject: [cvs-checkins] pci/rtl/verilog pci_bridge32.v
CVSROOT: /home/oc/cvs
Module name: pci
Changes by: mihad 03/12/10 13:03:01
Modified files:
rtl/verilog : pci_bridge32.v
Log message:
The wbs B3 to B2 translation logic had wrong reset wire connected!
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