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Message
From: OpenCores CVS Agent <cvs@w...>
Date: Tue, 15 Jul 2003 20:30:59 -0100
Subject: [cvs-checkins] camera/rtl/verilog camera_wb_if.v camera_top.v
CVSROOT: /home/oc/cvs
Module name: camera
Changes by: tadejm 03/07/15 20:30:58
Modified files:
rtl/verilog : camera_wb_if.v camera_top.v
Log message:
Added WISHBONE Rev. B3 state machine, additional logic to TestBench and verified the core.
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