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Message
From: OpenCores CVS Agent <cvs@w...>
Date: Wed, 22 Jan 2003 02:26:09 -0100
Subject: [cvs-checkins] or1k/or1200/rtl/verilog or1200_du.v
CVSROOT: /home/oc/cvs
Module name: or1k
Changes by: oc 03/01/22 02:26:07
Modified files:
or1200/rtl/verilog: or1200_du.v
Log message:
Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs]
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