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Message
From: OpenCores CVS Agent <cvs@w...>
Date: Mon, 30 Sep 2002 15:03:09 -0100
Subject: [cvs-checkins] pci/ tl/verilog/fifo_control.v tl/verilog/pciw ...
CVSROOT: /home/oc/cvs
Module name: pci
Changes by: mihad 02/09/30 15:03:09
Modified files:
rtl/verilog : fifo_control.v pciw_fifo_control.v
pciw_pcir_fifos.v wbr_fifo_control.v
wbw_fifo_control.v wbw_wbr_fifos.v
apps/crt/rtl/verilog: top.v
apps/crt/syn/ucf: pci_crt.ucf
sim/rtl_sim/bin: rtl_file_list.lst
Added files:
rtl/verilog : meta_flop.v
apps/crt/syn/synplify: pci_crt.prj pci_crt.sdc pci_crt.ucf
Log message:
Added meta flop module for easier meta stable FF identification during synthesis
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