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From: OpenCores CVS Agent <cvs-checkins-agent@o...>
Date: Mon, 29 Jul 2002 20:15:19 -0100
Subject: [cvs-checkins] uart16550/ ench/verilog/uart_test.v oc/CHANGES ...

CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	gorban	02/07/29 20:15:19

Modified files:
	bench/verilog  : uart_test.v 
	doc            : CHANGES.txt 
	sim/rtl_sim/bin: nc.scr 

Log message:
	Reverted to include uart_defines.v file in other files again.