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Message
From: OpenCores CVS Agent <cvs-checkins-agent@o...>
Date: Thu, 25 Jul 2002 17:29:02 -0100
Subject: [cvs-checkins] ethernet/rtl/verilog eth_wishbone.v
CVSROOT: /home/oc/cvs
Module name: ethernet
Changes by: mohor 02/07/25 17:29:02
Modified files:
rtl/verilog : eth_wishbone.v
Log message:
WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.
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